xref: /linux/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml (revision c619a804cc43345be3a1a1c4b46f72a3525cf1af) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/allwinner,sun9i-a80-usb-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A80 USB PHY Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  "#phy-cells":
15    const: 0
16
17  compatible:
18    const: allwinner,sun9i-a80-usb-phy
19
20  reg:
21    maxItems: 1
22
23  clocks:
24    anyOf:
25      - description: Main PHY Clock
26
27      - items:
28          - description: Main PHY clock
29          - description: HSIC 12MHz clock
30          - description: HSIC 480MHz clock
31
32  clock-names:
33    oneOf:
34      - const: phy
35
36      - items:
37          - const: phy
38          - const: hsic_12M
39          - const: hsic_480M
40
41  resets:
42    anyOf:
43      - description: Normal USB PHY reset
44
45      - items:
46          - description: Normal USB PHY reset
47          - description: HSIC Reset
48
49  reset-names:
50    oneOf:
51      - const: phy
52
53      - items:
54          - const: phy
55          - const: hsic
56
57  phy_type:
58    const: hsic
59    description:
60      When absent, the PHY type will be assumed to be normal USB.
61
62  phy-supply:
63    description:
64      Regulator that powers VBUS
65
66required:
67  - "#phy-cells"
68  - compatible
69  - reg
70  - clocks
71  - clock-names
72  - resets
73  - reset-names
74
75additionalProperties: false
76
77if:
78  properties:
79    phy_type:
80      const: hsic
81
82  required:
83    - phy_type
84
85then:
86  properties:
87    clocks:
88      maxItems: 3
89
90    clock-names:
91      maxItems: 3
92
93    resets:
94      maxItems: 2
95
96    reset-names:
97      maxItems: 2
98
99examples:
100  - |
101    #include <dt-bindings/clock/sun9i-a80-usb.h>
102    #include <dt-bindings/reset/sun9i-a80-usb.h>
103
104    usbphy1: phy@a00800 {
105        compatible = "allwinner,sun9i-a80-usb-phy";
106        reg = <0x00a00800 0x4>;
107        clocks = <&usb_clocks CLK_USB0_PHY>;
108        clock-names = "phy";
109        resets = <&usb_clocks RST_USB0_PHY>;
110        reset-names = "phy";
111        phy-supply = <&reg_usb1_vbus>;
112        #phy-cells = <0>;
113    };
114
115  - |
116    #include <dt-bindings/clock/sun9i-a80-usb.h>
117    #include <dt-bindings/reset/sun9i-a80-usb.h>
118
119    usbphy3: phy@a02800 {
120        compatible = "allwinner,sun9i-a80-usb-phy";
121        reg = <0x00a02800 0x4>;
122        clocks = <&usb_clocks CLK_USB2_PHY>,
123                 <&usb_clocks CLK_USB_HSIC>,
124                 <&usb_clocks CLK_USB2_HSIC>;
125        clock-names = "phy",
126                      "hsic_12M",
127                      "hsic_480M";
128        resets = <&usb_clocks RST_USB2_PHY>,
129                 <&usb_clocks RST_USB2_HSIC>;
130        reset-names = "phy",
131                      "hsic";
132        phy_type = "hsic";
133        phy-supply = <&reg_usb3_vbus>;
134        #phy-cells = <0>;
135    };
136