10b2f7ad1SMaxime Ripard# SPDX-License-Identifier: GPL-2.0 20b2f7ad1SMaxime Ripard%YAML 1.2 30b2f7ad1SMaxime Ripard--- 40b2f7ad1SMaxime Ripard$id: http://devicetree.org/schemas/phy/allwinner,sun8i-v3s-usb-phy.yaml# 50b2f7ad1SMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml# 60b2f7ad1SMaxime Ripard 7*dd3cb467SAndrew Lunntitle: Allwinner V3s USB PHY 80b2f7ad1SMaxime Ripard 90b2f7ad1SMaxime Ripardmaintainers: 100b2f7ad1SMaxime Ripard - Chen-Yu Tsai <wens@csie.org> 110b2f7ad1SMaxime Ripard - Maxime Ripard <mripard@kernel.org> 120b2f7ad1SMaxime Ripard 130b2f7ad1SMaxime Ripardproperties: 140b2f7ad1SMaxime Ripard "#phy-cells": 150b2f7ad1SMaxime Ripard const: 1 160b2f7ad1SMaxime Ripard 170b2f7ad1SMaxime Ripard compatible: 180b2f7ad1SMaxime Ripard const: allwinner,sun8i-v3s-usb-phy 190b2f7ad1SMaxime Ripard 200b2f7ad1SMaxime Ripard reg: 210b2f7ad1SMaxime Ripard items: 220b2f7ad1SMaxime Ripard - description: PHY Control registers 230b2f7ad1SMaxime Ripard - description: PHY PMU0 registers 240b2f7ad1SMaxime Ripard 250b2f7ad1SMaxime Ripard reg-names: 260b2f7ad1SMaxime Ripard items: 270b2f7ad1SMaxime Ripard - const: phy_ctrl 280b2f7ad1SMaxime Ripard - const: pmu0 290b2f7ad1SMaxime Ripard 300b2f7ad1SMaxime Ripard clocks: 310b2f7ad1SMaxime Ripard maxItems: 1 320b2f7ad1SMaxime Ripard description: USB OTG PHY bus clock 330b2f7ad1SMaxime Ripard 340b2f7ad1SMaxime Ripard clock-names: 350b2f7ad1SMaxime Ripard const: usb0_phy 360b2f7ad1SMaxime Ripard 370b2f7ad1SMaxime Ripard resets: 380b2f7ad1SMaxime Ripard maxItems: 1 390b2f7ad1SMaxime Ripard description: USB OTG reset 400b2f7ad1SMaxime Ripard 410b2f7ad1SMaxime Ripard reset-names: 420b2f7ad1SMaxime Ripard const: usb0_reset 430b2f7ad1SMaxime Ripard 440b2f7ad1SMaxime Ripard usb0_id_det-gpios: 450499220dSRob Herring maxItems: 1 460b2f7ad1SMaxime Ripard description: GPIO to the USB OTG ID pin 470b2f7ad1SMaxime Ripard 480b2f7ad1SMaxime Ripard usb0_vbus_det-gpios: 490499220dSRob Herring maxItems: 1 500b2f7ad1SMaxime Ripard description: GPIO to the USB OTG VBUS detect pin 510b2f7ad1SMaxime Ripard 520b2f7ad1SMaxime Ripard usb0_vbus_power-supply: 530b2f7ad1SMaxime Ripard description: Power supply to detect the USB OTG VBUS 540b2f7ad1SMaxime Ripard 550b2f7ad1SMaxime Ripard usb0_vbus-supply: 560b2f7ad1SMaxime Ripard description: Regulator controlling USB OTG VBUS 570b2f7ad1SMaxime Ripard 580b2f7ad1SMaxime Ripardrequired: 590b2f7ad1SMaxime Ripard - "#phy-cells" 600b2f7ad1SMaxime Ripard - compatible 610b2f7ad1SMaxime Ripard - clocks 620b2f7ad1SMaxime Ripard - clock-names 630b2f7ad1SMaxime Ripard - reg 640b2f7ad1SMaxime Ripard - reg-names 650b2f7ad1SMaxime Ripard - resets 660b2f7ad1SMaxime Ripard - reset-names 670b2f7ad1SMaxime Ripard 680b2f7ad1SMaxime RipardadditionalProperties: false 690b2f7ad1SMaxime Ripard 700b2f7ad1SMaxime Ripardexamples: 710b2f7ad1SMaxime Ripard - | 720b2f7ad1SMaxime Ripard #include <dt-bindings/gpio/gpio.h> 730b2f7ad1SMaxime Ripard #include <dt-bindings/clock/sun8i-v3s-ccu.h> 740b2f7ad1SMaxime Ripard #include <dt-bindings/reset/sun8i-v3s-ccu.h> 750b2f7ad1SMaxime Ripard 760b2f7ad1SMaxime Ripard phy@1c19400 { 770b2f7ad1SMaxime Ripard #phy-cells = <1>; 780b2f7ad1SMaxime Ripard compatible = "allwinner,sun8i-v3s-usb-phy"; 790b2f7ad1SMaxime Ripard reg = <0x01c19400 0x2c>, 800b2f7ad1SMaxime Ripard <0x01c1a800 0x4>; 810b2f7ad1SMaxime Ripard reg-names = "phy_ctrl", 820b2f7ad1SMaxime Ripard "pmu0"; 830b2f7ad1SMaxime Ripard clocks = <&ccu CLK_USB_PHY0>; 840b2f7ad1SMaxime Ripard clock-names = "usb0_phy"; 850b2f7ad1SMaxime Ripard resets = <&ccu RST_USB_PHY0>; 860b2f7ad1SMaxime Ripard reset-names = "usb0_reset"; 870b2f7ad1SMaxime Ripard usb0_id_det-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; 880b2f7ad1SMaxime Ripard }; 89