xref: /linux/Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml (revision 26fbb4c8c7c3ee9a4c3b4de555a8587b5a19154e) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/allwinner,sun8i-a83t-usb-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A83t USB PHY Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  "#phy-cells":
15    const: 1
16
17  compatible:
18    const: allwinner,sun8i-a83t-usb-phy
19
20  reg:
21    items:
22      - description: PHY Control registers
23      - description: PHY PMU1 registers
24      - description: PHY PMU2 registers
25
26  reg-names:
27    items:
28      - const: phy_ctrl
29      - const: pmu1
30      - const: pmu2
31
32  clocks:
33    items:
34      - description: USB OTG PHY bus clock
35      - description: USB Host 0 PHY bus clock
36      - description: USB Host 1 PHY bus clock
37      - description: USB HSIC 12MHz clock
38
39  clock-names:
40    items:
41      - const: usb0_phy
42      - const: usb1_phy
43      - const: usb2_phy
44      - const: usb2_hsic_12M
45
46  resets:
47    items:
48      - description: USB OTG reset
49      - description: USB Host 1 Controller reset
50      - description: USB Host 2 Controller reset
51
52  reset-names:
53    items:
54      - const: usb0_reset
55      - const: usb1_reset
56      - const: usb2_reset
57
58  usb0_id_det-gpios:
59    description: GPIO to the USB OTG ID pin
60
61  usb0_vbus_det-gpios:
62    description: GPIO to the USB OTG VBUS detect pin
63
64  usb0_vbus_power-supply:
65    description: Power supply to detect the USB OTG VBUS
66
67  usb0_vbus-supply:
68    description: Regulator controlling USB OTG VBUS
69
70  usb1_vbus-supply:
71    description: Regulator controlling USB1 Host controller
72
73  usb2_vbus-supply:
74    description: Regulator controlling USB2 Host controller
75
76required:
77  - "#phy-cells"
78  - compatible
79  - clocks
80  - clock-names
81  - reg
82  - reg-names
83  - resets
84  - reset-names
85
86additionalProperties: false
87
88examples:
89  - |
90    #include <dt-bindings/gpio/gpio.h>
91    #include <dt-bindings/clock/sun8i-a83t-ccu.h>
92    #include <dt-bindings/reset/sun8i-a83t-ccu.h>
93
94    phy@1c19400 {
95        #phy-cells = <1>;
96        compatible = "allwinner,sun8i-a83t-usb-phy";
97        reg = <0x01c19400 0x10>,
98              <0x01c1a800 0x14>,
99              <0x01c1b800 0x14>;
100        reg-names = "phy_ctrl",
101                    "pmu1",
102                    "pmu2";
103        clocks = <&ccu CLK_USB_PHY0>,
104                 <&ccu CLK_USB_PHY1>,
105                 <&ccu CLK_USB_HSIC>,
106                 <&ccu CLK_USB_HSIC_12M>;
107        clock-names = "usb0_phy",
108                      "usb1_phy",
109                      "usb2_phy",
110                      "usb2_hsic_12M";
111        resets = <&ccu RST_USB_PHY0>,
112                 <&ccu RST_USB_PHY1>,
113                 <&ccu RST_USB_HSIC>;
114        reset-names = "usb0_reset",
115                      "usb1_reset",
116                      "usb2_reset";
117        usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
118        usb0_vbus_power-supply = <&usb_power_supply>;
119        usb0_vbus-supply = <&reg_drivevbus>;
120        usb1_vbus-supply = <&reg_usb1_vbus>;
121        usb2_vbus-supply = <&reg_usb2_vbus>;
122    };
123