1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/allwinner,sun50i-a64-usb-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Allwinner A64 USB PHY 8 9maintainers: 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 12 13properties: 14 "#phy-cells": 15 const: 1 16 17 compatible: 18 oneOf: 19 - enum: 20 - allwinner,sun20i-d1-usb-phy 21 - allwinner,sun50i-a64-usb-phy 22 - items: 23 - enum: 24 - allwinner,sun50i-a100-usb-phy 25 - allwinner,sun55i-a523-usb-phy 26 - const: allwinner,sun20i-d1-usb-phy 27 28 reg: 29 items: 30 - description: PHY Control registers 31 - description: PHY PMU0 registers 32 - description: PHY PMU1 registers 33 34 reg-names: 35 items: 36 - const: phy_ctrl 37 - const: pmu0 38 - const: pmu1 39 40 clocks: 41 items: 42 - description: USB OTG PHY bus clock 43 - description: USB Host 0 PHY bus clock 44 45 clock-names: 46 items: 47 - const: usb0_phy 48 - const: usb1_phy 49 50 resets: 51 items: 52 - description: USB OTG reset 53 - description: USB Host 1 Controller reset 54 55 reset-names: 56 items: 57 - const: usb0_reset 58 - const: usb1_reset 59 60 usb0_id_det-gpios: 61 maxItems: 1 62 description: GPIO to the USB OTG ID pin 63 64 usb0_vbus_det-gpios: 65 maxItems: 1 66 description: GPIO to the USB OTG VBUS detect pin 67 68 usb0_vbus_power-supply: 69 description: Power supply to detect the USB OTG VBUS 70 71 usb0_vbus-supply: 72 description: Regulator controlling USB OTG VBUS 73 74 usb1_vbus-supply: 75 description: Regulator controlling USB1 Host controller 76 77required: 78 - "#phy-cells" 79 - compatible 80 - clocks 81 - clock-names 82 - reg 83 - reg-names 84 - resets 85 - reset-names 86 87additionalProperties: false 88 89examples: 90 - | 91 #include <dt-bindings/gpio/gpio.h> 92 #include <dt-bindings/clock/sun50i-a64-ccu.h> 93 #include <dt-bindings/reset/sun50i-a64-ccu.h> 94 95 phy@1c19400 { 96 #phy-cells = <1>; 97 compatible = "allwinner,sun50i-a64-usb-phy"; 98 reg = <0x01c19400 0x14>, 99 <0x01c1a800 0x4>, 100 <0x01c1b800 0x4>; 101 reg-names = "phy_ctrl", 102 "pmu0", 103 "pmu1"; 104 clocks = <&ccu CLK_USB_PHY0>, 105 <&ccu CLK_USB_PHY1>; 106 clock-names = "usb0_phy", 107 "usb1_phy"; 108 resets = <&ccu RST_USB_PHY0>, 109 <&ccu RST_USB_PHY1>; 110 reset-names = "usb0_reset", 111 "usb1_reset"; 112 usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ 113 usb0_vbus_power-supply = <&usb_power_supply>; 114 usb0_vbus-supply = <®_drivevbus>; 115 usb1_vbus-supply = <®_usb1_vbus>; 116 }; 117