xref: /linux/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml (revision 0b2f7ad1f2f65fd9d0488f98eb680e7cbc640e3f)
1*0b2f7ad1SMaxime Ripard# SPDX-License-Identifier: GPL-2.0
2*0b2f7ad1SMaxime Ripard%YAML 1.2
3*0b2f7ad1SMaxime Ripard---
4*0b2f7ad1SMaxime Ripard$id: http://devicetree.org/schemas/phy/allwinner,sun8i-h3-usb-phy.yaml#
5*0b2f7ad1SMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml#
6*0b2f7ad1SMaxime Ripard
7*0b2f7ad1SMaxime Ripardtitle: Allwinner H3 USB PHY Device Tree Bindings
8*0b2f7ad1SMaxime Ripard
9*0b2f7ad1SMaxime Ripardmaintainers:
10*0b2f7ad1SMaxime Ripard  - Chen-Yu Tsai <wens@csie.org>
11*0b2f7ad1SMaxime Ripard  - Maxime Ripard <mripard@kernel.org>
12*0b2f7ad1SMaxime Ripard
13*0b2f7ad1SMaxime Ripardproperties:
14*0b2f7ad1SMaxime Ripard  "#phy-cells":
15*0b2f7ad1SMaxime Ripard    const: 1
16*0b2f7ad1SMaxime Ripard
17*0b2f7ad1SMaxime Ripard  compatible:
18*0b2f7ad1SMaxime Ripard    const: allwinner,sun8i-h3-usb-phy
19*0b2f7ad1SMaxime Ripard
20*0b2f7ad1SMaxime Ripard  reg:
21*0b2f7ad1SMaxime Ripard    items:
22*0b2f7ad1SMaxime Ripard      - description: PHY Control registers
23*0b2f7ad1SMaxime Ripard      - description: PHY PMU0 registers
24*0b2f7ad1SMaxime Ripard      - description: PHY PMU1 registers
25*0b2f7ad1SMaxime Ripard      - description: PHY PMU2 registers
26*0b2f7ad1SMaxime Ripard      - description: PHY PMU3 registers
27*0b2f7ad1SMaxime Ripard
28*0b2f7ad1SMaxime Ripard  reg-names:
29*0b2f7ad1SMaxime Ripard    items:
30*0b2f7ad1SMaxime Ripard      - const: phy_ctrl
31*0b2f7ad1SMaxime Ripard      - const: pmu0
32*0b2f7ad1SMaxime Ripard      - const: pmu1
33*0b2f7ad1SMaxime Ripard      - const: pmu2
34*0b2f7ad1SMaxime Ripard      - const: pmu3
35*0b2f7ad1SMaxime Ripard
36*0b2f7ad1SMaxime Ripard  clocks:
37*0b2f7ad1SMaxime Ripard    items:
38*0b2f7ad1SMaxime Ripard      - description: USB OTG PHY bus clock
39*0b2f7ad1SMaxime Ripard      - description: USB Host 0 PHY bus clock
40*0b2f7ad1SMaxime Ripard      - description: USB Host 1 PHY bus clock
41*0b2f7ad1SMaxime Ripard      - description: USB Host 2 PHY bus clock
42*0b2f7ad1SMaxime Ripard
43*0b2f7ad1SMaxime Ripard  clock-names:
44*0b2f7ad1SMaxime Ripard    items:
45*0b2f7ad1SMaxime Ripard      - const: usb0_phy
46*0b2f7ad1SMaxime Ripard      - const: usb1_phy
47*0b2f7ad1SMaxime Ripard      - const: usb2_phy
48*0b2f7ad1SMaxime Ripard      - const: usb3_phy
49*0b2f7ad1SMaxime Ripard
50*0b2f7ad1SMaxime Ripard  resets:
51*0b2f7ad1SMaxime Ripard    items:
52*0b2f7ad1SMaxime Ripard      - description: USB OTG reset
53*0b2f7ad1SMaxime Ripard      - description: USB Host 1 Controller reset
54*0b2f7ad1SMaxime Ripard      - description: USB Host 2 Controller reset
55*0b2f7ad1SMaxime Ripard      - description: USB Host 3 Controller reset
56*0b2f7ad1SMaxime Ripard
57*0b2f7ad1SMaxime Ripard  reset-names:
58*0b2f7ad1SMaxime Ripard    items:
59*0b2f7ad1SMaxime Ripard      - const: usb0_reset
60*0b2f7ad1SMaxime Ripard      - const: usb1_reset
61*0b2f7ad1SMaxime Ripard      - const: usb2_reset
62*0b2f7ad1SMaxime Ripard      - const: usb3_reset
63*0b2f7ad1SMaxime Ripard
64*0b2f7ad1SMaxime Ripard  usb0_id_det-gpios:
65*0b2f7ad1SMaxime Ripard    description: GPIO to the USB OTG ID pin
66*0b2f7ad1SMaxime Ripard
67*0b2f7ad1SMaxime Ripard  usb0_vbus_det-gpios:
68*0b2f7ad1SMaxime Ripard    description: GPIO to the USB OTG VBUS detect pin
69*0b2f7ad1SMaxime Ripard
70*0b2f7ad1SMaxime Ripard  usb0_vbus_power-supply:
71*0b2f7ad1SMaxime Ripard    description: Power supply to detect the USB OTG VBUS
72*0b2f7ad1SMaxime Ripard
73*0b2f7ad1SMaxime Ripard  usb0_vbus-supply:
74*0b2f7ad1SMaxime Ripard    description: Regulator controlling USB OTG VBUS
75*0b2f7ad1SMaxime Ripard
76*0b2f7ad1SMaxime Ripard  usb1_vbus-supply:
77*0b2f7ad1SMaxime Ripard    description: Regulator controlling USB1 Host controller
78*0b2f7ad1SMaxime Ripard
79*0b2f7ad1SMaxime Ripard  usb2_vbus-supply:
80*0b2f7ad1SMaxime Ripard    description: Regulator controlling USB2 Host controller
81*0b2f7ad1SMaxime Ripard
82*0b2f7ad1SMaxime Ripard  usb3_vbus-supply:
83*0b2f7ad1SMaxime Ripard    description: Regulator controlling USB3 Host controller
84*0b2f7ad1SMaxime Ripard
85*0b2f7ad1SMaxime Ripardrequired:
86*0b2f7ad1SMaxime Ripard  - "#phy-cells"
87*0b2f7ad1SMaxime Ripard  - compatible
88*0b2f7ad1SMaxime Ripard  - clocks
89*0b2f7ad1SMaxime Ripard  - clock-names
90*0b2f7ad1SMaxime Ripard  - reg
91*0b2f7ad1SMaxime Ripard  - reg-names
92*0b2f7ad1SMaxime Ripard  - resets
93*0b2f7ad1SMaxime Ripard  - reset-names
94*0b2f7ad1SMaxime Ripard
95*0b2f7ad1SMaxime RipardadditionalProperties: false
96*0b2f7ad1SMaxime Ripard
97*0b2f7ad1SMaxime Ripardexamples:
98*0b2f7ad1SMaxime Ripard  - |
99*0b2f7ad1SMaxime Ripard    #include <dt-bindings/gpio/gpio.h>
100*0b2f7ad1SMaxime Ripard    #include <dt-bindings/clock/sun8i-h3-ccu.h>
101*0b2f7ad1SMaxime Ripard    #include <dt-bindings/reset/sun8i-h3-ccu.h>
102*0b2f7ad1SMaxime Ripard
103*0b2f7ad1SMaxime Ripard    phy@1c19400 {
104*0b2f7ad1SMaxime Ripard        #phy-cells = <1>;
105*0b2f7ad1SMaxime Ripard        compatible = "allwinner,sun8i-h3-usb-phy";
106*0b2f7ad1SMaxime Ripard        reg = <0x01c19400 0x2c>,
107*0b2f7ad1SMaxime Ripard              <0x01c1a800 0x4>,
108*0b2f7ad1SMaxime Ripard              <0x01c1b800 0x4>,
109*0b2f7ad1SMaxime Ripard              <0x01c1c800 0x4>,
110*0b2f7ad1SMaxime Ripard              <0x01c1d800 0x4>;
111*0b2f7ad1SMaxime Ripard        reg-names = "phy_ctrl",
112*0b2f7ad1SMaxime Ripard                    "pmu0",
113*0b2f7ad1SMaxime Ripard                    "pmu1",
114*0b2f7ad1SMaxime Ripard                    "pmu2",
115*0b2f7ad1SMaxime Ripard                    "pmu3";
116*0b2f7ad1SMaxime Ripard        clocks = <&ccu CLK_USB_PHY0>,
117*0b2f7ad1SMaxime Ripard                 <&ccu CLK_USB_PHY1>,
118*0b2f7ad1SMaxime Ripard                 <&ccu CLK_USB_PHY2>,
119*0b2f7ad1SMaxime Ripard                 <&ccu CLK_USB_PHY3>;
120*0b2f7ad1SMaxime Ripard        clock-names = "usb0_phy",
121*0b2f7ad1SMaxime Ripard                      "usb1_phy",
122*0b2f7ad1SMaxime Ripard                      "usb2_phy",
123*0b2f7ad1SMaxime Ripard                      "usb3_phy";
124*0b2f7ad1SMaxime Ripard        resets = <&ccu RST_USB_PHY0>,
125*0b2f7ad1SMaxime Ripard                 <&ccu RST_USB_PHY1>,
126*0b2f7ad1SMaxime Ripard                 <&ccu RST_USB_PHY2>,
127*0b2f7ad1SMaxime Ripard                 <&ccu RST_USB_PHY3>;
128*0b2f7ad1SMaxime Ripard        reset-names = "usb0_reset",
129*0b2f7ad1SMaxime Ripard                      "usb1_reset",
130*0b2f7ad1SMaxime Ripard                      "usb2_reset",
131*0b2f7ad1SMaxime Ripard                      "usb3_reset";
132*0b2f7ad1SMaxime Ripard        usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
133*0b2f7ad1SMaxime Ripard        usb0_vbus-supply = <&reg_usb0_vbus>;
134*0b2f7ad1SMaxime Ripard        usb1_vbus-supply = <&reg_usb1_vbus>;
135*0b2f7ad1SMaxime Ripard        usb2_vbus-supply = <&reg_usb2_vbus>;
136*0b2f7ad1SMaxime Ripard        usb3_vbus-supply = <&reg_usb3_vbus>;
137*0b2f7ad1SMaxime Ripard    };
138