xref: /linux/Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml (revision 0b2f7ad1f2f65fd9d0488f98eb680e7cbc640e3f)
1*0b2f7ad1SMaxime Ripard# SPDX-License-Identifier: GPL-2.0
2*0b2f7ad1SMaxime Ripard%YAML 1.2
3*0b2f7ad1SMaxime Ripard---
4*0b2f7ad1SMaxime Ripard$id: http://devicetree.org/schemas/phy/allwinner,sun8i-a23-usb-phy.yaml#
5*0b2f7ad1SMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml#
6*0b2f7ad1SMaxime Ripard
7*0b2f7ad1SMaxime Ripardtitle: Allwinner A23 USB PHY Device Tree Bindings
8*0b2f7ad1SMaxime Ripard
9*0b2f7ad1SMaxime Ripardmaintainers:
10*0b2f7ad1SMaxime Ripard  - Chen-Yu Tsai <wens@csie.org>
11*0b2f7ad1SMaxime Ripard  - Maxime Ripard <mripard@kernel.org>
12*0b2f7ad1SMaxime Ripard
13*0b2f7ad1SMaxime Ripardproperties:
14*0b2f7ad1SMaxime Ripard  "#phy-cells":
15*0b2f7ad1SMaxime Ripard    const: 1
16*0b2f7ad1SMaxime Ripard
17*0b2f7ad1SMaxime Ripard  compatible:
18*0b2f7ad1SMaxime Ripard    enum:
19*0b2f7ad1SMaxime Ripard      - allwinner,sun8i-a23-usb-phy
20*0b2f7ad1SMaxime Ripard      - allwinner,sun8i-a33-usb-phy
21*0b2f7ad1SMaxime Ripard
22*0b2f7ad1SMaxime Ripard  reg:
23*0b2f7ad1SMaxime Ripard    items:
24*0b2f7ad1SMaxime Ripard      - description: PHY Control registers
25*0b2f7ad1SMaxime Ripard      - description: PHY PMU1 registers
26*0b2f7ad1SMaxime Ripard
27*0b2f7ad1SMaxime Ripard  reg-names:
28*0b2f7ad1SMaxime Ripard    items:
29*0b2f7ad1SMaxime Ripard      - const: phy_ctrl
30*0b2f7ad1SMaxime Ripard      - const: pmu1
31*0b2f7ad1SMaxime Ripard
32*0b2f7ad1SMaxime Ripard  clocks:
33*0b2f7ad1SMaxime Ripard    items:
34*0b2f7ad1SMaxime Ripard      - description: USB OTG PHY bus clock
35*0b2f7ad1SMaxime Ripard      - description: USB Host 0 PHY bus clock
36*0b2f7ad1SMaxime Ripard
37*0b2f7ad1SMaxime Ripard  clock-names:
38*0b2f7ad1SMaxime Ripard    items:
39*0b2f7ad1SMaxime Ripard      - const: usb0_phy
40*0b2f7ad1SMaxime Ripard      - const: usb1_phy
41*0b2f7ad1SMaxime Ripard
42*0b2f7ad1SMaxime Ripard  resets:
43*0b2f7ad1SMaxime Ripard    items:
44*0b2f7ad1SMaxime Ripard      - description: USB OTG reset
45*0b2f7ad1SMaxime Ripard      - description: USB Host 1 Controller reset
46*0b2f7ad1SMaxime Ripard
47*0b2f7ad1SMaxime Ripard  reset-names:
48*0b2f7ad1SMaxime Ripard    items:
49*0b2f7ad1SMaxime Ripard      - const: usb0_reset
50*0b2f7ad1SMaxime Ripard      - const: usb1_reset
51*0b2f7ad1SMaxime Ripard
52*0b2f7ad1SMaxime Ripard  usb0_id_det-gpios:
53*0b2f7ad1SMaxime Ripard    description: GPIO to the USB OTG ID pin
54*0b2f7ad1SMaxime Ripard
55*0b2f7ad1SMaxime Ripard  usb0_vbus_det-gpios:
56*0b2f7ad1SMaxime Ripard    description: GPIO to the USB OTG VBUS detect pin
57*0b2f7ad1SMaxime Ripard
58*0b2f7ad1SMaxime Ripard  usb0_vbus_power-supply:
59*0b2f7ad1SMaxime Ripard    description: Power supply to detect the USB OTG VBUS
60*0b2f7ad1SMaxime Ripard
61*0b2f7ad1SMaxime Ripard  usb0_vbus-supply:
62*0b2f7ad1SMaxime Ripard    description: Regulator controlling USB OTG VBUS
63*0b2f7ad1SMaxime Ripard
64*0b2f7ad1SMaxime Ripard  usb1_vbus-supply:
65*0b2f7ad1SMaxime Ripard    description: Regulator controlling USB1 Host controller
66*0b2f7ad1SMaxime Ripard
67*0b2f7ad1SMaxime Ripardrequired:
68*0b2f7ad1SMaxime Ripard  - "#phy-cells"
69*0b2f7ad1SMaxime Ripard  - compatible
70*0b2f7ad1SMaxime Ripard  - clocks
71*0b2f7ad1SMaxime Ripard  - clock-names
72*0b2f7ad1SMaxime Ripard  - reg
73*0b2f7ad1SMaxime Ripard  - reg-names
74*0b2f7ad1SMaxime Ripard  - resets
75*0b2f7ad1SMaxime Ripard  - reset-names
76*0b2f7ad1SMaxime Ripard
77*0b2f7ad1SMaxime RipardadditionalProperties: false
78*0b2f7ad1SMaxime Ripard
79*0b2f7ad1SMaxime Ripardexamples:
80*0b2f7ad1SMaxime Ripard  - |
81*0b2f7ad1SMaxime Ripard    #include <dt-bindings/gpio/gpio.h>
82*0b2f7ad1SMaxime Ripard    #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
83*0b2f7ad1SMaxime Ripard    #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
84*0b2f7ad1SMaxime Ripard
85*0b2f7ad1SMaxime Ripard    phy@1c19400 {
86*0b2f7ad1SMaxime Ripard        #phy-cells = <1>;
87*0b2f7ad1SMaxime Ripard        compatible = "allwinner,sun8i-a23-usb-phy";
88*0b2f7ad1SMaxime Ripard        reg = <0x01c19400 0x10>, <0x01c1a800 0x4>;
89*0b2f7ad1SMaxime Ripard        reg-names = "phy_ctrl", "pmu1";
90*0b2f7ad1SMaxime Ripard        clocks = <&ccu CLK_USB_PHY0>,
91*0b2f7ad1SMaxime Ripard                 <&ccu CLK_USB_PHY1>;
92*0b2f7ad1SMaxime Ripard        clock-names = "usb0_phy",
93*0b2f7ad1SMaxime Ripard                      "usb1_phy";
94*0b2f7ad1SMaxime Ripard        resets = <&ccu RST_USB_PHY0>,
95*0b2f7ad1SMaxime Ripard                 <&ccu RST_USB_PHY1>;
96*0b2f7ad1SMaxime Ripard        reset-names = "usb0_reset",
97*0b2f7ad1SMaxime Ripard                      "usb1_reset";
98*0b2f7ad1SMaxime Ripard        usb0_id_det-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
99*0b2f7ad1SMaxime Ripard        usb0_vbus_power-supply = <&usb_power_supply>;
100*0b2f7ad1SMaxime Ripard        usb0_vbus-supply = <&reg_drivevbus>;
101*0b2f7ad1SMaxime Ripard        usb1_vbus-supply = <&reg_usb1_vbus>;
102*0b2f7ad1SMaxime Ripard    };
103