xref: /linux/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml (revision d0c00977a16a1c785b3e9a3b95026ea5ac27cfb5)
1fd0ae78dSAnson Huang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2fd0ae78dSAnson Huang%YAML 1.2
3fd0ae78dSAnson Huang---
4fd0ae78dSAnson Huang$id: http://devicetree.org/schemas/perf/fsl-imx-ddr.yaml#
5fd0ae78dSAnson Huang$schema: http://devicetree.org/meta-schemas/core.yaml#
6fd0ae78dSAnson Huang
7fd0ae78dSAnson Huangtitle: Freescale(NXP) IMX8 DDR performance monitor
8fd0ae78dSAnson Huang
9fd0ae78dSAnson Huangmaintainers:
10fd0ae78dSAnson Huang  - Frank Li <frank.li@nxp.com>
11fd0ae78dSAnson Huang
12fd0ae78dSAnson Huangproperties:
13fd0ae78dSAnson Huang  compatible:
147f1f43f4SKrzysztof Kozlowski    oneOf:
157f1f43f4SKrzysztof Kozlowski      - enum:
16fd0ae78dSAnson Huang          - fsl,imx8-ddr-pmu
17fd0ae78dSAnson Huang          - fsl,imx8m-ddr-pmu
18*d0c00977SJoakim Zhang          - fsl,imx8mq-ddr-pmu
19*d0c00977SJoakim Zhang          - fsl,imx8mm-ddr-pmu
20*d0c00977SJoakim Zhang          - fsl,imx8mn-ddr-pmu
21fd0ae78dSAnson Huang          - fsl,imx8mp-ddr-pmu
227f1f43f4SKrzysztof Kozlowski      - items:
237f1f43f4SKrzysztof Kozlowski          - enum:
247f1f43f4SKrzysztof Kozlowski              - fsl,imx8mm-ddr-pmu
257f1f43f4SKrzysztof Kozlowski              - fsl,imx8mn-ddr-pmu
267f1f43f4SKrzysztof Kozlowski              - fsl,imx8mq-ddr-pmu
277f1f43f4SKrzysztof Kozlowski              - fsl,imx8mp-ddr-pmu
287f1f43f4SKrzysztof Kozlowski          - const: fsl,imx8m-ddr-pmu
29fd0ae78dSAnson Huang
30fd0ae78dSAnson Huang  reg:
31fd0ae78dSAnson Huang    maxItems: 1
32fd0ae78dSAnson Huang
33fd0ae78dSAnson Huang  interrupts:
34fd0ae78dSAnson Huang    maxItems: 1
35fd0ae78dSAnson Huang
36fd0ae78dSAnson Huangrequired:
37fd0ae78dSAnson Huang  - compatible
38fd0ae78dSAnson Huang  - reg
39fd0ae78dSAnson Huang  - interrupts
40fd0ae78dSAnson Huang
41fd0ae78dSAnson HuangadditionalProperties: false
42fd0ae78dSAnson Huang
43fd0ae78dSAnson Huangexamples:
44fd0ae78dSAnson Huang  - |
45fd0ae78dSAnson Huang    #include <dt-bindings/interrupt-controller/arm-gic.h>
46fd0ae78dSAnson Huang
47fd0ae78dSAnson Huang    ddr-pmu@5c020000 {
48fd0ae78dSAnson Huang        compatible = "fsl,imx8-ddr-pmu";
49fd0ae78dSAnson Huang        reg = <0x5c020000 0x10000>;
50fd0ae78dSAnson Huang        interrupt-parent = <&gic>;
51fd0ae78dSAnson Huang        interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
52fd0ae78dSAnson Huang    };
53