xref: /linux/Documentation/devicetree/bindings/perf/arm,coresight-pmu.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/perf/arm,coresight-pmu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Arm Coresight Performance Monitoring Unit Architecture
8
9maintainers:
10  - Robin Murphy <robin.murphy@arm.com>
11
12properties:
13  compatible:
14    const: arm,coresight-pmu
15
16  reg:
17    items:
18      - description: Register page 0
19      - description: Register page 1, if the PMU implements the dual-page extension
20    minItems: 1
21
22  interrupts:
23    items:
24      - description: Overflow interrupt
25
26  cpus:
27    description: If the PMU is associated with a particular CPU or subset of CPUs,
28      array of phandles to the appropriate CPU node(s)
29
30  reg-io-width:
31    description: Granularity at which PMU register accesses are single-copy atomic
32    default: 4
33    enum: [4, 8]
34
35required:
36  - compatible
37  - reg
38
39additionalProperties: false
40