1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright 2020 Arm Ltd. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/perf/arm,cmn.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Arm CMN (Coherent Mesh Network) Performance Monitors 9 10maintainers: 11 - Robin Murphy <robin.murphy@arm.com> 12 13properties: 14 compatible: 15 enum: 16 - arm,cmn-600 17 - arm,cmn-650 18 - arm,cmn-700 19 - arm,cmn-s3 20 - arm,ci-700 21 22 reg: 23 items: 24 - description: Physical address of the base (PERIPHBASE) and 25 size of the configuration address space. 26 27 interrupts: 28 minItems: 1 29 items: 30 - description: Overflow interrupt for DTC0 31 - description: Overflow interrupt for DTC1 32 - description: Overflow interrupt for DTC2 33 - description: Overflow interrupt for DTC3 34 description: One interrupt for each DTC domain implemented must 35 be specified, in order. DTC0 is always present. 36 37 arm,root-node: 38 $ref: /schemas/types.yaml#/definitions/uint32 39 description: Offset from PERIPHBASE of CMN-600's configuration 40 discovery node (see TRM definition of ROOTNODEBASE). Not 41 relevant for newer CMN/CI products. 42 43required: 44 - compatible 45 - reg 46 - interrupts 47 48if: 49 properties: 50 compatible: 51 contains: 52 const: arm,cmn-600 53then: 54 required: 55 - arm,root-node 56 57additionalProperties: false 58 59examples: 60 - | 61 #include <dt-bindings/interrupt-controller/arm-gic.h> 62 #include <dt-bindings/interrupt-controller/irq.h> 63 pmu@50000000 { 64 compatible = "arm,cmn-600"; 65 reg = <0x50000000 0x4000000>; 66 /* 4x2 mesh with one DTC, and CFG node at 0,1,1,0 */ 67 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 68 arm,root-node = <0x104000>; 69 }; 70... 71