xref: /linux/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml (revision 1d7ecc8084ca8b1edde7a462ebd9bfecc84550ac)
12d0b208bSRobin Murphy# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
22d0b208bSRobin Murphy# Copyright 2021 Arm Ltd.
32d0b208bSRobin Murphy%YAML 1.2
42d0b208bSRobin Murphy---
52d0b208bSRobin Murphy$id: http://devicetree.org/schemas/perf/arm,dsu-pmu.yaml#
62d0b208bSRobin Murphy$schema: http://devicetree.org/meta-schemas/core.yaml#
72d0b208bSRobin Murphy
82d0b208bSRobin Murphytitle: ARM DynamIQ Shared Unit (DSU) Performance Monitor Unit (PMU)
92d0b208bSRobin Murphy
102d0b208bSRobin Murphymaintainers:
112d0b208bSRobin Murphy  - Suzuki K Poulose <suzuki.poulose@arm.com>
122d0b208bSRobin Murphy  - Robin Murphy <robin.murphy@arm.com>
132d0b208bSRobin Murphy
142d0b208bSRobin Murphydescription:
152d0b208bSRobin Murphy  ARM DynamIQ Shared Unit (DSU) integrates one or more CPU cores with a shared
162d0b208bSRobin Murphy  L3 memory system, control logic and external interfaces to form a multicore
172d0b208bSRobin Murphy  cluster. The PMU enables gathering various statistics on the operation of the
182d0b208bSRobin Murphy  DSU. The PMU provides independent 32-bit counters that can count any of the
192d0b208bSRobin Murphy  supported events, along with a 64-bit cycle counter. The PMU is accessed via
202d0b208bSRobin Murphy  CPU system registers and has no MMIO component.
212d0b208bSRobin Murphy
222d0b208bSRobin Murphyproperties:
232d0b208bSRobin Murphy  compatible:
24*1d7ecc80SRobin Murphy    oneOf:
25*1d7ecc80SRobin Murphy      - const: arm,dsu-pmu
26*1d7ecc80SRobin Murphy      - items:
27*1d7ecc80SRobin Murphy          - const: arm,dsu-110-pmu
28*1d7ecc80SRobin Murphy          - const: arm,dsu-pmu
292d0b208bSRobin Murphy
302d0b208bSRobin Murphy  interrupts:
312d0b208bSRobin Murphy    items:
322d0b208bSRobin Murphy      - description: nCLUSTERPMUIRQ interrupt
332d0b208bSRobin Murphy
342d0b208bSRobin Murphy  cpus:
352d0b208bSRobin Murphy    $ref: /schemas/types.yaml#/definitions/phandle-array
362d0b208bSRobin Murphy    minItems: 1
37*1d7ecc80SRobin Murphy    maxItems: 12
382d0b208bSRobin Murphy    description: List of phandles for the CPUs connected to this DSU instance.
392d0b208bSRobin Murphy
402d0b208bSRobin Murphyrequired:
412d0b208bSRobin Murphy  - compatible
422d0b208bSRobin Murphy  - interrupts
432d0b208bSRobin Murphy  - cpus
442d0b208bSRobin Murphy
452d0b208bSRobin MurphyadditionalProperties: false
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