14ae1cd7dSThippeswamy Havalige# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 24ae1cd7dSThippeswamy Havalige%YAML 1.2 34ae1cd7dSThippeswamy Havalige--- 44ae1cd7dSThippeswamy Havalige$id: http://devicetree.org/schemas/pci/xlnx,xdma-host.yaml# 54ae1cd7dSThippeswamy Havalige$schema: http://devicetree.org/meta-schemas/core.yaml# 64ae1cd7dSThippeswamy Havalige 74ae1cd7dSThippeswamy Havaligetitle: Xilinx XDMA PL PCIe Root Port Bridge 84ae1cd7dSThippeswamy Havalige 94ae1cd7dSThippeswamy Havaligemaintainers: 104ae1cd7dSThippeswamy Havalige - Thippeswamy Havalige <thippeswamy.havalige@amd.com> 114ae1cd7dSThippeswamy Havalige 124ae1cd7dSThippeswamy HavaligeallOf: 135db62b7dSKrzysztof Kozlowski - $ref: /schemas/pci/pci-host-bridge.yaml# 144ae1cd7dSThippeswamy Havalige 154ae1cd7dSThippeswamy Havaligeproperties: 164ae1cd7dSThippeswamy Havalige compatible: 17*899d5482SThippeswamy Havalige enum: 18*899d5482SThippeswamy Havalige - xlnx,xdma-host-3.00 19*899d5482SThippeswamy Havalige - xlnx,qdma-host-3.00 204ae1cd7dSThippeswamy Havalige 214ae1cd7dSThippeswamy Havalige reg: 22*899d5482SThippeswamy Havalige items: 23*899d5482SThippeswamy Havalige - description: configuration region and XDMA bridge register. 24*899d5482SThippeswamy Havalige - description: QDMA bridge register. 25*899d5482SThippeswamy Havalige minItems: 1 26*899d5482SThippeswamy Havalige 27*899d5482SThippeswamy Havalige reg-names: 28*899d5482SThippeswamy Havalige items: 29*899d5482SThippeswamy Havalige - const: cfg 30*899d5482SThippeswamy Havalige - const: breg 31*899d5482SThippeswamy Havalige minItems: 1 324ae1cd7dSThippeswamy Havalige 334ae1cd7dSThippeswamy Havalige ranges: 344ae1cd7dSThippeswamy Havalige maxItems: 2 354ae1cd7dSThippeswamy Havalige 364ae1cd7dSThippeswamy Havalige interrupts: 374ae1cd7dSThippeswamy Havalige items: 384ae1cd7dSThippeswamy Havalige - description: interrupt asserted when miscellaneous interrupt is received. 394ae1cd7dSThippeswamy Havalige - description: msi0 interrupt asserted when an MSI is received. 404ae1cd7dSThippeswamy Havalige - description: msi1 interrupt asserted when an MSI is received. 414ae1cd7dSThippeswamy Havalige 424ae1cd7dSThippeswamy Havalige interrupt-names: 434ae1cd7dSThippeswamy Havalige items: 444ae1cd7dSThippeswamy Havalige - const: misc 454ae1cd7dSThippeswamy Havalige - const: msi0 464ae1cd7dSThippeswamy Havalige - const: msi1 474ae1cd7dSThippeswamy Havalige 484ae1cd7dSThippeswamy Havalige interrupt-map-mask: 494ae1cd7dSThippeswamy Havalige items: 504ae1cd7dSThippeswamy Havalige - const: 0 514ae1cd7dSThippeswamy Havalige - const: 0 524ae1cd7dSThippeswamy Havalige - const: 0 534ae1cd7dSThippeswamy Havalige - const: 7 544ae1cd7dSThippeswamy Havalige 554ae1cd7dSThippeswamy Havalige interrupt-map: 564ae1cd7dSThippeswamy Havalige maxItems: 4 574ae1cd7dSThippeswamy Havalige 584ae1cd7dSThippeswamy Havalige "#interrupt-cells": 594ae1cd7dSThippeswamy Havalige const: 1 604ae1cd7dSThippeswamy Havalige 614ae1cd7dSThippeswamy Havalige interrupt-controller: 624ae1cd7dSThippeswamy Havalige description: identifies the node as an interrupt controller 634ae1cd7dSThippeswamy Havalige type: object 644ae1cd7dSThippeswamy Havalige properties: 654ae1cd7dSThippeswamy Havalige interrupt-controller: true 664ae1cd7dSThippeswamy Havalige 674ae1cd7dSThippeswamy Havalige "#address-cells": 684ae1cd7dSThippeswamy Havalige const: 0 694ae1cd7dSThippeswamy Havalige 704ae1cd7dSThippeswamy Havalige "#interrupt-cells": 714ae1cd7dSThippeswamy Havalige const: 1 724ae1cd7dSThippeswamy Havalige 734ae1cd7dSThippeswamy Havalige required: 744ae1cd7dSThippeswamy Havalige - interrupt-controller 754ae1cd7dSThippeswamy Havalige - "#address-cells" 764ae1cd7dSThippeswamy Havalige - "#interrupt-cells" 774ae1cd7dSThippeswamy Havalige 784ae1cd7dSThippeswamy Havalige additionalProperties: false 794ae1cd7dSThippeswamy Havalige 804ae1cd7dSThippeswamy Havaligerequired: 814ae1cd7dSThippeswamy Havalige - compatible 824ae1cd7dSThippeswamy Havalige - reg 834ae1cd7dSThippeswamy Havalige - ranges 844ae1cd7dSThippeswamy Havalige - interrupts 854ae1cd7dSThippeswamy Havalige - interrupt-map 864ae1cd7dSThippeswamy Havalige - interrupt-map-mask 874ae1cd7dSThippeswamy Havalige - "#interrupt-cells" 884ae1cd7dSThippeswamy Havalige - interrupt-controller 894ae1cd7dSThippeswamy Havalige 90*899d5482SThippeswamy Havaligeif: 91*899d5482SThippeswamy Havalige properties: 92*899d5482SThippeswamy Havalige compatible: 93*899d5482SThippeswamy Havalige contains: 94*899d5482SThippeswamy Havalige enum: 95*899d5482SThippeswamy Havalige - xlnx,qdma-host-3.00 96*899d5482SThippeswamy Havaligethen: 97*899d5482SThippeswamy Havalige properties: 98*899d5482SThippeswamy Havalige reg: 99*899d5482SThippeswamy Havalige minItems: 2 100*899d5482SThippeswamy Havalige reg-names: 101*899d5482SThippeswamy Havalige minItems: 2 102*899d5482SThippeswamy Havalige required: 103*899d5482SThippeswamy Havalige - reg-names 104*899d5482SThippeswamy Havaligeelse: 105*899d5482SThippeswamy Havalige properties: 106*899d5482SThippeswamy Havalige reg: 107*899d5482SThippeswamy Havalige maxItems: 1 108*899d5482SThippeswamy Havalige reg-names: 109*899d5482SThippeswamy Havalige maxItems: 1 110*899d5482SThippeswamy Havalige 1114ae1cd7dSThippeswamy HavaligeunevaluatedProperties: false 1124ae1cd7dSThippeswamy Havalige 1134ae1cd7dSThippeswamy Havaligeexamples: 1144ae1cd7dSThippeswamy Havalige 1154ae1cd7dSThippeswamy Havalige - | 1164ae1cd7dSThippeswamy Havalige #include <dt-bindings/interrupt-controller/arm-gic.h> 1174ae1cd7dSThippeswamy Havalige #include <dt-bindings/interrupt-controller/irq.h> 1184ae1cd7dSThippeswamy Havalige 1194ae1cd7dSThippeswamy Havalige soc { 1204ae1cd7dSThippeswamy Havalige #address-cells = <2>; 1214ae1cd7dSThippeswamy Havalige #size-cells = <2>; 1224ae1cd7dSThippeswamy Havalige pcie@a0000000 { 1234ae1cd7dSThippeswamy Havalige compatible = "xlnx,xdma-host-3.00"; 1244ae1cd7dSThippeswamy Havalige reg = <0x0 0xa0000000 0x0 0x10000000>; 1254ae1cd7dSThippeswamy Havalige ranges = <0x2000000 0x0 0xb0000000 0x0 0xb0000000 0x0 0x1000000>, 1264ae1cd7dSThippeswamy Havalige <0x43000000 0x5 0x0 0x5 0x0 0x0 0x1000000>; 1274ae1cd7dSThippeswamy Havalige #address-cells = <3>; 1284ae1cd7dSThippeswamy Havalige #size-cells = <2>; 1294ae1cd7dSThippeswamy Havalige #interrupt-cells = <1>; 1304ae1cd7dSThippeswamy Havalige device_type = "pci"; 1314ae1cd7dSThippeswamy Havalige interrupt-parent = <&gic>; 1324ae1cd7dSThippeswamy Havalige interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 1334ae1cd7dSThippeswamy Havalige <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 1344ae1cd7dSThippeswamy Havalige interrupt-names = "misc", "msi0", "msi1"; 1354ae1cd7dSThippeswamy Havalige interrupt-map-mask = <0x0 0x0 0x0 0x7>; 1364ae1cd7dSThippeswamy Havalige interrupt-map = <0 0 0 1 &pcie_intc_0 0>, 1374ae1cd7dSThippeswamy Havalige <0 0 0 2 &pcie_intc_0 1>, 1384ae1cd7dSThippeswamy Havalige <0 0 0 3 &pcie_intc_0 2>, 1394ae1cd7dSThippeswamy Havalige <0 0 0 4 &pcie_intc_0 3>; 1404ae1cd7dSThippeswamy Havalige pcie_intc_0: interrupt-controller { 1414ae1cd7dSThippeswamy Havalige #address-cells = <0>; 1424ae1cd7dSThippeswamy Havalige #interrupt-cells = <1>; 1434ae1cd7dSThippeswamy Havalige interrupt-controller; 1444ae1cd7dSThippeswamy Havalige }; 1454ae1cd7dSThippeswamy Havalige }; 1464ae1cd7dSThippeswamy Havalige }; 147