xref: /linux/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml (revision 057646a5db2f8873efba90eeffd165c2525b413f) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare PCIe endpoint interface
8
9maintainers:
10  - Jingoo Han <jingoohan1@gmail.com>
11  - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
12
13description: |
14  Synopsys DesignWare PCIe host controller endpoint
15
16allOf:
17  - $ref: /schemas/pci/pci-ep.yaml#
18  - $ref: /schemas/pci/snps,dw-pcie-common.yaml#
19
20properties:
21  compatible:
22    anyOf:
23      - {}
24      - const: snps,dw-pcie-ep
25
26  reg:
27    description: |
28      It should contain Data Bus Interface (dbi) and config registers for all
29      versions.
30      For designware core version >= 4.80, it may contain ATU address space.
31    minItems: 2
32    maxItems: 4
33
34  reg-names:
35    minItems: 2
36    maxItems: 4
37    items:
38      enum: [dbi, dbi2, config, atu, addr_space, link, atu_dma, appl]
39
40required:
41  - reg
42  - reg-names
43  - compatible
44
45additionalProperties: true
46
47examples:
48  - |
49    bus {
50      #address-cells = <1>;
51      #size-cells = <1>;
52      pcie-ep@dfd00000 {
53        compatible = "snps,dw-pcie-ep";
54        reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
55              <0xdfc01000 0x0001000>, /* IP registers 2 */
56              <0xd0000000 0x2000000>; /* Configuration space */
57        reg-names = "dbi", "dbi2", "addr_space";
58      };
59    };
60