1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/rockchip-dw-pcie-common.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: DesignWare based PCIe RC/EP controller on Rockchip SoCs 8 9maintainers: 10 - Shawn Lin <shawn.lin@rock-chips.com> 11 - Simon Xue <xxm@rock-chips.com> 12 - Heiko Stuebner <heiko@sntech.de> 13 14description: |+ 15 Generic properties for the DesignWare based PCIe RC/EP controller on Rockchip 16 SoCs. 17 18properties: 19 clocks: 20 minItems: 5 21 items: 22 - description: AHB clock for PCIe master 23 - description: AHB clock for PCIe slave 24 - description: AHB clock for PCIe dbi 25 - description: APB clock for PCIe 26 - description: Auxiliary clock for PCIe 27 - description: PIPE clock 28 - description: Reference clock for PCIe 29 30 clock-names: 31 minItems: 5 32 items: 33 - const: aclk_mst 34 - const: aclk_slv 35 - const: aclk_dbi 36 - const: pclk 37 - const: aux 38 - const: pipe 39 - const: ref 40 41 interrupts: 42 items: 43 - description: 44 Combined system interrupt, which is used to signal the following 45 interrupts - phy_link_up, dll_link_up, link_req_rst_not, hp_pme, 46 hp, hp_msi, link_auto_bw, link_auto_bw_msi, bw_mgt, bw_mgt_msi, 47 edma_wr, edma_rd, dpa_sub_upd, rbar_update, link_eq_req, ep_elbi_app 48 - description: 49 Combined PM interrupt, which is used to signal the following 50 interrupts - linkst_in_l1sub, linkst_in_l1, linkst_in_l2, 51 linkst_in_l0s, linkst_out_l1sub, linkst_out_l1, linkst_out_l2, 52 linkst_out_l0s, pm_dstate_update 53 - description: 54 Combined message interrupt, which is used to signal the following 55 interrupts - ven_msg, unlock_msg, ltr_msg, cfg_pme, cfg_pme_msi, 56 pm_pme, pm_to_ack, pm_turnoff, obff_idle, obff_obff, obff_cpu_active 57 - description: 58 Combined legacy interrupt, which is used to signal the following 59 interrupts - inta, intb, intc, intd 60 - description: 61 Combined error interrupt, which is used to signal the following 62 interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout, 63 tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx, 64 nf_err_rx, f_err_rx, radm_qoverflow 65 66 interrupt-names: 67 items: 68 - const: sys 69 - const: pmc 70 - const: msg 71 - const: legacy 72 - const: err 73 74 num-lanes: true 75 76 phys: 77 maxItems: 1 78 79 phy-names: 80 const: pcie-phy 81 82 power-domains: 83 maxItems: 1 84 85 resets: 86 minItems: 1 87 maxItems: 2 88 89 reset-names: 90 oneOf: 91 - const: pipe 92 - items: 93 - const: pwr 94 - const: pipe 95 96required: 97 - compatible 98 - reg 99 - reg-names 100 - clocks 101 - clock-names 102 - num-lanes 103 - phys 104 - phy-names 105 - power-domains 106 - resets 107 - reset-names 108 109additionalProperties: true 110 111... 112