xref: /linux/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml (revision 55d0969c451159cff86949b38c39171cab962069) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pci/rockchip-dw-pcie-common.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: DesignWare based PCIe RC/EP controller on Rockchip SoCs
8
9maintainers:
10  - Shawn Lin <shawn.lin@rock-chips.com>
11  - Simon Xue <xxm@rock-chips.com>
12  - Heiko Stuebner <heiko@sntech.de>
13
14description: |+
15  Generic properties for the DesignWare based PCIe RC/EP controller on Rockchip
16  SoCs.
17
18properties:
19  clocks:
20    minItems: 5
21    items:
22      - description: AHB clock for PCIe master
23      - description: AHB clock for PCIe slave
24      - description: AHB clock for PCIe dbi
25      - description: APB clock for PCIe
26      - description: Auxiliary clock for PCIe
27      - description: PIPE clock
28      - description: Reference clock for PCIe
29
30  clock-names:
31    minItems: 5
32    items:
33      - const: aclk_mst
34      - const: aclk_slv
35      - const: aclk_dbi
36      - const: pclk
37      - const: aux
38      - const: pipe
39      - const: ref
40
41  interrupts:
42    minItems: 5
43    items:
44      - description:
45          Combined system interrupt, which is used to signal the following
46          interrupts - phy_link_up, dll_link_up, link_req_rst_not, hp_pme,
47          hp, hp_msi, link_auto_bw, link_auto_bw_msi, bw_mgt, bw_mgt_msi,
48          edma_wr, edma_rd, dpa_sub_upd, rbar_update, link_eq_req, ep_elbi_app
49      - description:
50          Combined PM interrupt, which is used to signal the following
51          interrupts - linkst_in_l1sub, linkst_in_l1, linkst_in_l2,
52          linkst_in_l0s, linkst_out_l1sub, linkst_out_l1, linkst_out_l2,
53          linkst_out_l0s, pm_dstate_update
54      - description:
55          Combined message interrupt, which is used to signal the following
56          interrupts - ven_msg, unlock_msg, ltr_msg, cfg_pme, cfg_pme_msi,
57          pm_pme, pm_to_ack, pm_turnoff, obff_idle, obff_obff, obff_cpu_active
58      - description:
59          Combined legacy interrupt, which is used to signal the following
60          interrupts - inta, intb, intc, intd, tx_inta, tx_intb, tx_intc,
61          tx_intd
62      - description:
63          Combined error interrupt, which is used to signal the following
64          interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout,
65          tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx,
66          nf_err_rx, f_err_rx, radm_qoverflow
67      - description:
68          eDMA write channel 0 interrupt
69      - description:
70          eDMA write channel 1 interrupt
71      - description:
72          eDMA read channel 0 interrupt
73      - description:
74          eDMA read channel 1 interrupt
75
76  interrupt-names:
77    minItems: 5
78    items:
79      - const: sys
80      - const: pmc
81      - const: msg
82      - const: legacy
83      - const: err
84      - const: dma0
85      - const: dma1
86      - const: dma2
87      - const: dma3
88
89  num-lanes: true
90
91  phys:
92    maxItems: 1
93
94  phy-names:
95    const: pcie-phy
96
97  power-domains:
98    maxItems: 1
99
100  resets:
101    minItems: 1
102    maxItems: 2
103
104  reset-names:
105    oneOf:
106      - const: pipe
107      - items:
108          - const: pwr
109          - const: pipe
110
111required:
112  - compatible
113  - reg
114  - reg-names
115  - clocks
116  - clock-names
117  - num-lanes
118  - phys
119  - phy-names
120  - power-domains
121  - resets
122  - reset-names
123
124additionalProperties: true
125
126...
127