xref: /linux/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
1409ae431SHerve Codina# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2409ae431SHerve Codina%YAML 1.2
3409ae431SHerve Codina---
4409ae431SHerve Codina$id: http://devicetree.org/schemas/pci/renesas,pci-rcar-gen2.yaml#
5409ae431SHerve Codina$schema: http://devicetree.org/meta-schemas/core.yaml#
6409ae431SHerve Codina
7409ae431SHerve Codinatitle: Renesas AHB to PCI bridge
8409ae431SHerve Codina
9409ae431SHerve Codinamaintainers:
10409ae431SHerve Codina  - Marek Vasut <marek.vasut+renesas@gmail.com>
11409ae431SHerve Codina  - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
12409ae431SHerve Codina
13409ae431SHerve Codinadescription: |
14409ae431SHerve Codina  This is the bridge used internally to connect the USB controllers to the
15409ae431SHerve Codina  AHB. There is one bridge instance per USB port connected to the internal
16409ae431SHerve Codina  OHCI and EHCI controllers.
17409ae431SHerve Codina
18409ae431SHerve Codinaproperties:
19409ae431SHerve Codina  compatible:
20409ae431SHerve Codina    oneOf:
21409ae431SHerve Codina      - items:
22409ae431SHerve Codina          - enum:
23409ae431SHerve Codina              - renesas,pci-r8a7742      # RZ/G1H
24409ae431SHerve Codina              - renesas,pci-r8a7743      # RZ/G1M
25409ae431SHerve Codina              - renesas,pci-r8a7744      # RZ/G1N
26409ae431SHerve Codina              - renesas,pci-r8a7745      # RZ/G1E
27409ae431SHerve Codina              - renesas,pci-r8a7790      # R-Car H2
28409ae431SHerve Codina              - renesas,pci-r8a7791      # R-Car M2-W
29409ae431SHerve Codina              - renesas,pci-r8a7793      # R-Car M2-N
30409ae431SHerve Codina              - renesas,pci-r8a7794      # R-Car E2
31409ae431SHerve Codina          - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1
322ed9ae81SHerve Codina      - items:
332ed9ae81SHerve Codina          - enum:
342ed9ae81SHerve Codina              - renesas,pci-r9a06g032     # RZ/N1D
352ed9ae81SHerve Codina          - const: renesas,pci-rzn1       # RZ/N1
36409ae431SHerve Codina
37409ae431SHerve Codina  reg:
38409ae431SHerve Codina    items:
39409ae431SHerve Codina      - description: Operational registers for the OHCI/EHCI controllers.
40409ae431SHerve Codina      - description: Bridge configuration and control registers.
41409ae431SHerve Codina
42409ae431SHerve Codina  interrupts:
43409ae431SHerve Codina    maxItems: 1
44409ae431SHerve Codina
45*c62a0b8fSKrzysztof Kozlowski  clocks:
46*c62a0b8fSKrzysztof Kozlowski    minItems: 1
47*c62a0b8fSKrzysztof Kozlowski    maxItems: 3
48409ae431SHerve Codina
49*c62a0b8fSKrzysztof Kozlowski  clock-names:
50*c62a0b8fSKrzysztof Kozlowski    minItems: 1
51*c62a0b8fSKrzysztof Kozlowski    maxItems: 3
52409ae431SHerve Codina
53409ae431SHerve Codina  resets:
54409ae431SHerve Codina    maxItems: 1
55409ae431SHerve Codina
56409ae431SHerve Codina  power-domains:
57409ae431SHerve Codina    maxItems: 1
58409ae431SHerve Codina
59409ae431SHerve Codina  bus-range:
60409ae431SHerve Codina    description: |
61409ae431SHerve Codina      The PCI bus number range; as this is a single bus, the range
62409ae431SHerve Codina      should be specified as the same value twice.
63409ae431SHerve Codina
64409ae431SHerve Codina  dma-ranges:
65409ae431SHerve Codina    description: |
66409ae431SHerve Codina      A single range for the inbound memory region. If not supplied,
67409ae431SHerve Codina      defaults to 1GiB at 0x40000000. Note there are hardware restrictions on
68409ae431SHerve Codina      the allowed combinations of address and size.
69409ae431SHerve Codina    maxItems: 1
70409ae431SHerve Codina
71409ae431SHerve CodinapatternProperties:
727621aabdSRob Herring  '^usb@[0-1],0$':
73409ae431SHerve Codina    type: object
74409ae431SHerve Codina
75409ae431SHerve Codina    description:
76409ae431SHerve Codina      This a USB controller PCI device
77409ae431SHerve Codina
78409ae431SHerve Codina    properties:
79409ae431SHerve Codina      reg:
80409ae431SHerve Codina        description:
81409ae431SHerve Codina          Identify the correct bus, device and function number in the
82409ae431SHerve Codina          form <bdf 0 0 0 0>.
83409ae431SHerve Codina
84409ae431SHerve Codina        items:
85409ae431SHerve Codina          minItems: 5
86409ae431SHerve Codina          maxItems: 5
87409ae431SHerve Codina
88409ae431SHerve Codina      phys:
89409ae431SHerve Codina        description:
90409ae431SHerve Codina          Reference to the USB phy
91409ae431SHerve Codina        maxItems: 1
92409ae431SHerve Codina
93409ae431SHerve Codina      phy-names:
94409ae431SHerve Codina        maxItems: 1
95409ae431SHerve Codina
96409ae431SHerve Codina    required:
97409ae431SHerve Codina      - reg
98409ae431SHerve Codina      - phys
99409ae431SHerve Codina      - phy-names
100409ae431SHerve Codina
101409ae431SHerve Codina    unevaluatedProperties: false
102409ae431SHerve Codina
103409ae431SHerve Codinarequired:
104409ae431SHerve Codina  - compatible
105409ae431SHerve Codina  - reg
106409ae431SHerve Codina  - interrupts
107409ae431SHerve Codina  - interrupt-map
108409ae431SHerve Codina  - interrupt-map-mask
109409ae431SHerve Codina  - clocks
110409ae431SHerve Codina  - power-domains
111409ae431SHerve Codina  - bus-range
112409ae431SHerve Codina  - "#address-cells"
113409ae431SHerve Codina  - "#size-cells"
114409ae431SHerve Codina  - "#interrupt-cells"
115409ae431SHerve Codina
1162ed9ae81SHerve CodinaallOf:
1175db62b7dSKrzysztof Kozlowski  - $ref: /schemas/pci/pci-host-bridge.yaml#
1182ed9ae81SHerve Codina
1192ed9ae81SHerve Codina  - if:
1202ed9ae81SHerve Codina      properties:
1212ed9ae81SHerve Codina        compatible:
1222ed9ae81SHerve Codina          contains:
1232ed9ae81SHerve Codina            enum:
1242ed9ae81SHerve Codina              - renesas,pci-rzn1
1252ed9ae81SHerve Codina    then:
1262ed9ae81SHerve Codina      properties:
1272ed9ae81SHerve Codina        clocks:
1282ed9ae81SHerve Codina          items:
1292ed9ae81SHerve Codina            - description: Internal bus clock (AHB) for HOST
1302ed9ae81SHerve Codina            - description: Internal bus clock (AHB) Power Management
1312ed9ae81SHerve Codina            - description: PCI clock for USB subsystem
1322ed9ae81SHerve Codina        clock-names:
1332ed9ae81SHerve Codina          items:
1342ed9ae81SHerve Codina            - const: hclkh
1352ed9ae81SHerve Codina            - const: hclkpm
1362ed9ae81SHerve Codina            - const: pciclk
1372ed9ae81SHerve Codina      required:
1382ed9ae81SHerve Codina        - clock-names
1392ed9ae81SHerve Codina    else:
1402ed9ae81SHerve Codina      properties:
1412ed9ae81SHerve Codina        clocks:
1422ed9ae81SHerve Codina          items:
1432ed9ae81SHerve Codina            - description: Device clock
1442ed9ae81SHerve Codina        clock-names:
1452ed9ae81SHerve Codina          items:
1462ed9ae81SHerve Codina            - const: pclk
1472ed9ae81SHerve Codina      required:
1482ed9ae81SHerve Codina        - resets
1492ed9ae81SHerve Codina
150409ae431SHerve CodinaunevaluatedProperties: false
151409ae431SHerve Codina
152409ae431SHerve Codinaexamples:
153409ae431SHerve Codina  - |
154409ae431SHerve Codina    #include <dt-bindings/interrupt-controller/arm-gic.h>
155409ae431SHerve Codina    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
156409ae431SHerve Codina    #include <dt-bindings/power/r8a7790-sysc.h>
157409ae431SHerve Codina
158409ae431SHerve Codina    pci@ee090000  {
159409ae431SHerve Codina        compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
160409ae431SHerve Codina        device_type = "pci";
161409ae431SHerve Codina        reg = <0xee090000 0xc00>,
162409ae431SHerve Codina              <0xee080000 0x1100>;
163409ae431SHerve Codina        clocks = <&cpg CPG_MOD 703>;
164409ae431SHerve Codina        power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
165409ae431SHerve Codina        resets = <&cpg 703>;
166409ae431SHerve Codina        interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
167409ae431SHerve Codina
168409ae431SHerve Codina        bus-range = <0 0>;
169409ae431SHerve Codina        #address-cells = <3>;
170409ae431SHerve Codina        #size-cells = <2>;
171409ae431SHerve Codina        #interrupt-cells = <1>;
172409ae431SHerve Codina        ranges = <0x02000000 0 0xee080000 0xee080000 0 0x00010000>;
173409ae431SHerve Codina        dma-ranges = <0x42000000 0 0x40000000 0x40000000 0 0x40000000>;
174409ae431SHerve Codina        interrupt-map-mask = <0xf800 0 0 0x7>;
175409ae431SHerve Codina        interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
176409ae431SHerve Codina                        <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
177409ae431SHerve Codina                        <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
178409ae431SHerve Codina
179409ae431SHerve Codina        usb@1,0 {
180409ae431SHerve Codina            reg = <0x800 0 0 0 0>;
181409ae431SHerve Codina            phys = <&usb0 0>;
182409ae431SHerve Codina            phy-names = "usb";
183409ae431SHerve Codina        };
184409ae431SHerve Codina
185409ae431SHerve Codina        usb@2,0 {
186409ae431SHerve Codina            reg = <0x1000 0 0 0 0>;
187409ae431SHerve Codina            phys = <&usb0 0>;
188409ae431SHerve Codina            phy-names = "usb";
189409ae431SHerve Codina        };
190409ae431SHerve Codina    };
191