xref: /linux/Documentation/devicetree/bindings/pci/rcar-gen4-pci-ep.yaml (revision 68c402fe5c5e5aa9a04c8bba9d99feb08a68afa7) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2022-2023 Renesas Electronics Corp.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/pci/rcar-gen4-pci-ep.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Renesas R-Car Gen4 PCIe Endpoint
9
10maintainers:
11  - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
12
13allOf:
14  - $ref: snps,dw-pcie-ep.yaml#
15
16properties:
17  compatible:
18    items:
19      - enum:
20          - renesas,r8a779f0-pcie-ep      # R-Car S4-8
21          - renesas,r8a779g0-pcie-ep      # R-Car V4H
22      - const: renesas,rcar-gen4-pcie-ep  # R-Car Gen4
23
24  reg:
25    maxItems: 7
26
27  reg-names:
28    items:
29      - const: dbi
30      - const: dbi2
31      - const: atu
32      - const: dma
33      - const: app
34      - const: phy
35      - const: addr_space
36
37  interrupts:
38    maxItems: 3
39
40  interrupt-names:
41    items:
42      - const: dma
43      - const: sft_ce
44      - const: app
45
46  clocks:
47    maxItems: 2
48
49  clock-names:
50    items:
51      - const: core
52      - const: ref
53
54  power-domains:
55    maxItems: 1
56
57  resets:
58    maxItems: 1
59
60  reset-names:
61    items:
62      - const: pwr
63
64  max-link-speed:
65    maximum: 4
66
67  num-lanes:
68    maximum: 4
69
70  max-functions:
71    maximum: 2
72
73required:
74  - compatible
75  - reg
76  - reg-names
77  - interrupts
78  - interrupt-names
79  - clocks
80  - clock-names
81  - power-domains
82  - resets
83  - reset-names
84
85unevaluatedProperties: false
86
87examples:
88  - |
89    #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
90    #include <dt-bindings/interrupt-controller/arm-gic.h>
91    #include <dt-bindings/power/r8a779f0-sysc.h>
92
93    soc {
94        #address-cells = <2>;
95        #size-cells = <2>;
96
97        pcie0_ep: pcie-ep@e65d0000 {
98            compatible = "renesas,r8a779f0-pcie-ep", "renesas,rcar-gen4-pcie-ep";
99            reg = <0 0xe65d0000 0 0x2000>, <0 0xe65d2000 0 0x1000>,
100                  <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
101                  <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>,
102                  <0 0xfe000000 0 0x400000>;
103            reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space";
104            interrupts = <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
105                         <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
106                         <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
107            interrupt-names = "dma", "sft_ce", "app";
108            clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>;
109            clock-names = "core", "ref";
110            power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
111            resets = <&cpg 624>;
112            reset-names = "pwr";
113            max-link-speed = <4>;
114            num-lanes = <2>;
115            max-functions = /bits/ 8 <2>;
116        };
117    };
118