1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PCI express root complex 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 12 13description: | 14 Qualcomm PCIe root complex controller is based on the Synopsys DesignWare 15 PCIe IP. 16 17properties: 18 compatible: 19 oneOf: 20 - enum: 21 - qcom,pcie-apq8064 22 - qcom,pcie-apq8084 23 - qcom,pcie-ipq4019 24 - qcom,pcie-ipq6018 25 - qcom,pcie-ipq8064 26 - qcom,pcie-ipq8064-v2 27 - qcom,pcie-ipq8074 28 - qcom,pcie-ipq8074-gen3 29 - qcom,pcie-ipq9574 30 - qcom,pcie-msm8996 31 - qcom,pcie-qcs404 32 - qcom,pcie-sdm845 33 - qcom,pcie-sdx55 34 - items: 35 - const: qcom,pcie-msm8998 36 - const: qcom,pcie-msm8996 37 38 reg: 39 minItems: 4 40 maxItems: 6 41 42 reg-names: 43 minItems: 4 44 maxItems: 6 45 46 interrupts: 47 minItems: 1 48 maxItems: 8 49 50 interrupt-names: 51 minItems: 1 52 maxItems: 8 53 54 iommu-map: 55 minItems: 1 56 maxItems: 16 57 58 # Common definitions for clocks, clock-names and reset. 59 # Platform constraints are described later. 60 clocks: 61 minItems: 3 62 maxItems: 13 63 64 clock-names: 65 minItems: 3 66 maxItems: 13 67 68 dma-coherent: true 69 70 interconnects: 71 maxItems: 2 72 73 interconnect-names: 74 items: 75 - const: pcie-mem 76 - const: cpu-pcie 77 78 resets: 79 minItems: 1 80 maxItems: 12 81 82 reset-names: 83 minItems: 1 84 maxItems: 12 85 86 vdda-supply: 87 description: A phandle to the core analog power supply 88 89 vdda_phy-supply: 90 description: A phandle to the core analog power supply for PHY 91 92 vdda_refclk-supply: 93 description: A phandle to the core analog power supply for IC which generates reference clock 94 95 vddpe-3v3-supply: 96 description: A phandle to the PCIe endpoint power supply 97 98 phys: 99 maxItems: 1 100 101 phy-names: 102 items: 103 - const: pciephy 104 105 power-domains: 106 maxItems: 1 107 108 perst-gpios: 109 description: GPIO controlled connection to PERST# signal 110 maxItems: 1 111 112 required-opps: 113 maxItems: 1 114 115 wake-gpios: 116 description: GPIO controlled connection to WAKE# signal 117 maxItems: 1 118 119required: 120 - compatible 121 - reg 122 - reg-names 123 - interrupt-map-mask 124 - interrupt-map 125 - clocks 126 - clock-names 127 128anyOf: 129 - required: 130 - interrupts 131 - interrupt-names 132 - "#interrupt-cells" 133 - required: 134 - msi-map 135 136allOf: 137 - $ref: /schemas/pci/pci-host-bridge.yaml# 138 - if: 139 properties: 140 compatible: 141 contains: 142 enum: 143 - qcom,pcie-apq8064 144 - qcom,pcie-ipq4019 145 - qcom,pcie-ipq8064 146 - qcom,pcie-ipq8064v2 147 - qcom,pcie-ipq8074 148 - qcom,pcie-qcs404 149 then: 150 properties: 151 reg: 152 minItems: 4 153 maxItems: 4 154 reg-names: 155 items: 156 - const: dbi # DesignWare PCIe registers 157 - const: elbi # External local bus interface registers 158 - const: parf # Qualcomm specific registers 159 - const: config # PCIe configuration space 160 161 - if: 162 properties: 163 compatible: 164 contains: 165 enum: 166 - qcom,pcie-ipq6018 167 - qcom,pcie-ipq8074-gen3 168 - qcom,pcie-ipq9574 169 then: 170 properties: 171 reg: 172 minItems: 5 173 maxItems: 5 174 reg-names: 175 items: 176 - const: dbi # DesignWare PCIe registers 177 - const: elbi # External local bus interface registers 178 - const: atu # ATU address space 179 - const: parf # Qualcomm specific registers 180 - const: config # PCIe configuration space 181 182 - if: 183 properties: 184 compatible: 185 contains: 186 enum: 187 - qcom,pcie-apq8084 188 - qcom,pcie-msm8996 189 - qcom,pcie-sdm845 190 then: 191 properties: 192 reg: 193 minItems: 4 194 maxItems: 5 195 reg-names: 196 minItems: 4 197 items: 198 - const: parf # Qualcomm specific registers 199 - const: dbi # DesignWare PCIe registers 200 - const: elbi # External local bus interface registers 201 - const: config # PCIe configuration space 202 - const: mhi # MHI registers 203 204 - if: 205 properties: 206 compatible: 207 contains: 208 enum: 209 - qcom,pcie-sdx55 210 then: 211 properties: 212 reg: 213 minItems: 5 214 maxItems: 6 215 reg-names: 216 minItems: 5 217 items: 218 - const: parf # Qualcomm specific registers 219 - const: dbi # DesignWare PCIe registers 220 - const: elbi # External local bus interface registers 221 - const: atu # ATU address space 222 - const: config # PCIe configuration space 223 - const: mhi # MHI registers 224 225 - if: 226 properties: 227 compatible: 228 contains: 229 enum: 230 - qcom,pcie-apq8064 231 - qcom,pcie-ipq8064 232 - qcom,pcie-ipq8064v2 233 then: 234 properties: 235 clocks: 236 minItems: 3 237 maxItems: 5 238 clock-names: 239 minItems: 3 240 items: 241 - const: core # Clocks the pcie hw block 242 - const: iface # Configuration AHB clock 243 - const: phy # Clocks the pcie PHY block 244 - const: aux # Clocks the pcie AUX block, not on apq8064 245 - const: ref # Clocks the pcie ref block, not on apq8064 246 resets: 247 minItems: 5 248 maxItems: 6 249 reset-names: 250 minItems: 5 251 items: 252 - const: axi # AXI reset 253 - const: ahb # AHB reset 254 - const: por # POR reset 255 - const: pci # PCI reset 256 - const: phy # PHY reset 257 - const: ext # EXT reset, not on apq8064 258 required: 259 - vdda-supply 260 - vdda_phy-supply 261 - vdda_refclk-supply 262 263 - if: 264 properties: 265 compatible: 266 contains: 267 enum: 268 - qcom,pcie-apq8084 269 then: 270 properties: 271 clocks: 272 minItems: 4 273 maxItems: 4 274 clock-names: 275 items: 276 - const: iface # Configuration AHB clock 277 - const: master_bus # Master AXI clock 278 - const: slave_bus # Slave AXI clock 279 - const: aux # Auxiliary (AUX) clock 280 resets: 281 maxItems: 1 282 reset-names: 283 items: 284 - const: core # Core reset 285 286 - if: 287 properties: 288 compatible: 289 contains: 290 enum: 291 - qcom,pcie-ipq4019 292 then: 293 properties: 294 clocks: 295 minItems: 3 296 maxItems: 3 297 clock-names: 298 items: 299 - const: aux # Auxiliary (AUX) clock 300 - const: master_bus # Master AXI clock 301 - const: slave_bus # Slave AXI clock 302 resets: 303 minItems: 12 304 maxItems: 12 305 reset-names: 306 items: 307 - const: axi_m # AXI master reset 308 - const: axi_s # AXI slave reset 309 - const: pipe # PIPE reset 310 - const: axi_m_vmid # VMID reset 311 - const: axi_s_xpu # XPU reset 312 - const: parf # PARF reset 313 - const: phy # PHY reset 314 - const: axi_m_sticky # AXI sticky reset 315 - const: pipe_sticky # PIPE sticky reset 316 - const: pwr # PWR reset 317 - const: ahb # AHB reset 318 - const: phy_ahb # PHY AHB reset 319 320 - if: 321 properties: 322 compatible: 323 contains: 324 enum: 325 - qcom,pcie-msm8996 326 then: 327 properties: 328 clocks: 329 minItems: 5 330 maxItems: 5 331 clock-names: 332 items: 333 - const: pipe # Pipe Clock driving internal logic 334 - const: aux # Auxiliary (AUX) clock 335 - const: cfg # Configuration clock 336 - const: bus_master # Master AXI clock 337 - const: bus_slave # Slave AXI clock 338 resets: false 339 reset-names: false 340 341 - if: 342 properties: 343 compatible: 344 contains: 345 enum: 346 - qcom,pcie-ipq8074 347 then: 348 properties: 349 clocks: 350 minItems: 5 351 maxItems: 5 352 clock-names: 353 items: 354 - const: iface # PCIe to SysNOC BIU clock 355 - const: axi_m # AXI Master clock 356 - const: axi_s # AXI Slave clock 357 - const: ahb # AHB clock 358 - const: aux # Auxiliary clock 359 resets: 360 minItems: 7 361 maxItems: 7 362 reset-names: 363 items: 364 - const: pipe # PIPE reset 365 - const: sleep # Sleep reset 366 - const: sticky # Core Sticky reset 367 - const: axi_m # AXI Master reset 368 - const: axi_s # AXI Slave reset 369 - const: ahb # AHB Reset 370 - const: axi_m_sticky # AXI Master Sticky reset 371 372 - if: 373 properties: 374 compatible: 375 contains: 376 enum: 377 - qcom,pcie-ipq6018 378 - qcom,pcie-ipq8074-gen3 379 then: 380 properties: 381 clocks: 382 minItems: 5 383 maxItems: 5 384 clock-names: 385 items: 386 - const: iface # PCIe to SysNOC BIU clock 387 - const: axi_m # AXI Master clock 388 - const: axi_s # AXI Slave clock 389 - const: axi_bridge # AXI bridge clock 390 - const: rchng 391 resets: 392 minItems: 8 393 maxItems: 8 394 reset-names: 395 items: 396 - const: pipe # PIPE reset 397 - const: sleep # Sleep reset 398 - const: sticky # Core Sticky reset 399 - const: axi_m # AXI Master reset 400 - const: axi_s # AXI Slave reset 401 - const: ahb # AHB Reset 402 - const: axi_m_sticky # AXI Master Sticky reset 403 - const: axi_s_sticky # AXI Slave Sticky reset 404 405 - if: 406 properties: 407 compatible: 408 contains: 409 enum: 410 - qcom,pcie-ipq9574 411 then: 412 properties: 413 clocks: 414 minItems: 6 415 maxItems: 6 416 clock-names: 417 items: 418 - const: axi_m # AXI Master clock 419 - const: axi_s # AXI Slave clock 420 - const: axi_bridge 421 - const: rchng 422 - const: ahb 423 - const: aux 424 425 resets: 426 minItems: 8 427 maxItems: 8 428 reset-names: 429 items: 430 - const: pipe # PIPE reset 431 - const: sticky # Core Sticky reset 432 - const: axi_s_sticky # AXI Slave Sticky reset 433 - const: axi_s # AXI Slave reset 434 - const: axi_m_sticky # AXI Master Sticky reset 435 - const: axi_m # AXI Master reset 436 - const: aux # AUX Reset 437 - const: ahb # AHB Reset 438 439 interrupts: 440 minItems: 8 441 interrupt-names: 442 items: 443 - const: msi0 444 - const: msi1 445 - const: msi2 446 - const: msi3 447 - const: msi4 448 - const: msi5 449 - const: msi6 450 - const: msi7 451 452 - if: 453 properties: 454 compatible: 455 contains: 456 enum: 457 - qcom,pcie-qcs404 458 then: 459 properties: 460 clocks: 461 minItems: 4 462 maxItems: 4 463 clock-names: 464 items: 465 - const: iface # AHB clock 466 - const: aux # Auxiliary clock 467 - const: master_bus # AXI Master clock 468 - const: slave_bus # AXI Slave clock 469 resets: 470 minItems: 6 471 maxItems: 6 472 reset-names: 473 items: 474 - const: axi_m # AXI Master reset 475 - const: axi_s # AXI Slave reset 476 - const: axi_m_sticky # AXI Master Sticky reset 477 - const: pipe_sticky # PIPE sticky reset 478 - const: pwr # PWR reset 479 - const: ahb # AHB reset 480 481 - if: 482 properties: 483 compatible: 484 contains: 485 enum: 486 - qcom,pcie-sdm845 487 then: 488 oneOf: 489 # Unfortunately the "optional" ref clock is used in the middle of the list 490 - properties: 491 clocks: 492 minItems: 8 493 maxItems: 8 494 clock-names: 495 items: 496 - const: pipe # PIPE clock 497 - const: aux # Auxiliary clock 498 - const: cfg # Configuration clock 499 - const: bus_master # Master AXI clock 500 - const: bus_slave # Slave AXI clock 501 - const: slave_q2a # Slave Q2A clock 502 - const: ref # REFERENCE clock 503 - const: tbu # PCIe TBU clock 504 - properties: 505 clocks: 506 minItems: 7 507 maxItems: 7 508 clock-names: 509 items: 510 - const: pipe # PIPE clock 511 - const: aux # Auxiliary clock 512 - const: cfg # Configuration clock 513 - const: bus_master # Master AXI clock 514 - const: bus_slave # Slave AXI clock 515 - const: slave_q2a # Slave Q2A clock 516 - const: tbu # PCIe TBU clock 517 properties: 518 resets: 519 maxItems: 1 520 reset-names: 521 items: 522 - const: pci # PCIe core reset 523 524 - if: 525 properties: 526 compatible: 527 contains: 528 enum: 529 - qcom,pcie-sdx55 530 then: 531 properties: 532 clocks: 533 minItems: 7 534 maxItems: 7 535 clock-names: 536 items: 537 - const: pipe # PIPE clock 538 - const: aux # Auxiliary clock 539 - const: cfg # Configuration clock 540 - const: bus_master # Master AXI clock 541 - const: bus_slave # Slave AXI clock 542 - const: slave_q2a # Slave Q2A clock 543 - const: sleep # PCIe Sleep clock 544 resets: 545 maxItems: 1 546 reset-names: 547 items: 548 - const: pci # PCIe core reset 549 550 - if: 551 not: 552 properties: 553 compatible: 554 contains: 555 enum: 556 - qcom,pcie-apq8064 557 - qcom,pcie-ipq4019 558 - qcom,pcie-ipq8064 559 - qcom,pcie-ipq8064v2 560 - qcom,pcie-ipq8074 561 - qcom,pcie-ipq8074-gen3 562 - qcom,pcie-ipq9574 563 - qcom,pcie-qcs404 564 then: 565 required: 566 - power-domains 567 568 - if: 569 not: 570 properties: 571 compatible: 572 contains: 573 enum: 574 - qcom,pcie-msm8996 575 then: 576 required: 577 - resets 578 - reset-names 579 580 - if: 581 properties: 582 compatible: 583 contains: 584 enum: 585 - qcom,pcie-msm8996 586 - qcom,pcie-sdm845 587 then: 588 oneOf: 589 - properties: 590 interrupts: 591 maxItems: 1 592 interrupt-names: 593 items: 594 - const: msi 595 - properties: 596 interrupts: 597 minItems: 8 598 interrupt-names: 599 items: 600 - const: msi0 601 - const: msi1 602 - const: msi2 603 - const: msi3 604 - const: msi4 605 - const: msi5 606 - const: msi6 607 - const: msi7 608 609 - if: 610 properties: 611 compatible: 612 contains: 613 enum: 614 - qcom,pcie-apq8064 615 - qcom,pcie-apq8084 616 - qcom,pcie-ipq4019 617 - qcom,pcie-ipq6018 618 - qcom,pcie-ipq8064 619 - qcom,pcie-ipq8064-v2 620 - qcom,pcie-ipq8074 621 - qcom,pcie-ipq8074-gen3 622 - qcom,pcie-qcs404 623 then: 624 properties: 625 interrupts: 626 maxItems: 1 627 interrupt-names: 628 items: 629 - const: msi 630 631unevaluatedProperties: false 632 633examples: 634 - | 635 #include <dt-bindings/interrupt-controller/arm-gic.h> 636 pcie@1b500000 { 637 compatible = "qcom,pcie-ipq8064"; 638 reg = <0x1b500000 0x1000>, 639 <0x1b502000 0x80>, 640 <0x1b600000 0x100>, 641 <0x0ff00000 0x100000>; 642 reg-names = "dbi", "elbi", "parf", "config"; 643 device_type = "pci"; 644 linux,pci-domain = <0>; 645 bus-range = <0x00 0xff>; 646 num-lanes = <1>; 647 #address-cells = <3>; 648 #size-cells = <2>; 649 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, 650 <0x82000000 0 0 0x08000000 0 0x07e00000>; 651 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 652 interrupt-names = "msi"; 653 #interrupt-cells = <1>; 654 interrupt-map-mask = <0 0 0 0x7>; 655 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, 656 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, 657 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, 658 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; 659 clocks = <&gcc 41>, 660 <&gcc 43>, 661 <&gcc 44>, 662 <&gcc 42>, 663 <&gcc 248>; 664 clock-names = "core", "iface", "phy", "aux", "ref"; 665 resets = <&gcc 27>, 666 <&gcc 26>, 667 <&gcc 25>, 668 <&gcc 24>, 669 <&gcc 23>, 670 <&gcc 22>; 671 reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; 672 pinctrl-0 = <&pcie_pins_default>; 673 pinctrl-names = "default"; 674 vdda-supply = <&pm8921_s3>; 675 vdda_phy-supply = <&pm8921_lvs6>; 676 vdda_refclk-supply = <&ext_3p3v>; 677 }; 678 - | 679 #include <dt-bindings/interrupt-controller/arm-gic.h> 680 #include <dt-bindings/gpio/gpio.h> 681 pcie@fc520000 { 682 compatible = "qcom,pcie-apq8084"; 683 reg = <0xfc520000 0x2000>, 684 <0xff000000 0x1000>, 685 <0xff001000 0x1000>, 686 <0xff002000 0x2000>; 687 reg-names = "parf", "dbi", "elbi", "config"; 688 device_type = "pci"; 689 linux,pci-domain = <0>; 690 bus-range = <0x00 0xff>; 691 num-lanes = <1>; 692 #address-cells = <3>; 693 #size-cells = <2>; 694 ranges = <0x81000000 0 0 0xff200000 0 0x00100000>, 695 <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; 696 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 697 interrupt-names = "msi"; 698 #interrupt-cells = <1>; 699 interrupt-map-mask = <0 0 0 0x7>; 700 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, 701 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, 702 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, 703 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; 704 clocks = <&gcc 324>, 705 <&gcc 325>, 706 <&gcc 327>, 707 <&gcc 323>; 708 clock-names = "iface", "master_bus", "slave_bus", "aux"; 709 resets = <&gcc 81>; 710 reset-names = "core"; 711 power-domains = <&gcc 1>; 712 vdda-supply = <&pma8084_l3>; 713 phys = <&pciephy0>; 714 phy-names = "pciephy"; 715 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>; 716 pinctrl-0 = <&pcie0_pins_default>; 717 pinctrl-names = "default"; 718 }; 719... 720