1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm PCI express root complex 8 9maintainers: 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 12 13description: | 14 Qualcomm PCIe root complex controller is based on the Synopsys DesignWare 15 PCIe IP. 16 17properties: 18 compatible: 19 oneOf: 20 - enum: 21 - qcom,pcie-apq8064 22 - qcom,pcie-apq8084 23 - qcom,pcie-ipq4019 24 - qcom,pcie-ipq5018 25 - qcom,pcie-ipq6018 26 - qcom,pcie-ipq8064 27 - qcom,pcie-ipq8064-v2 28 - qcom,pcie-ipq8074 29 - qcom,pcie-ipq8074-gen3 30 - qcom,pcie-ipq9574 31 - qcom,pcie-msm8996 32 - qcom,pcie-qcs404 33 - qcom,pcie-sdm845 34 - qcom,pcie-sdx55 35 - items: 36 - enum: 37 - qcom,pcie-ipq5332 38 - qcom,pcie-ipq5424 39 - const: qcom,pcie-ipq9574 40 - items: 41 - const: qcom,pcie-msm8998 42 - const: qcom,pcie-msm8996 43 44 reg: 45 minItems: 4 46 maxItems: 6 47 48 reg-names: 49 minItems: 4 50 maxItems: 6 51 52 interrupts: 53 minItems: 1 54 maxItems: 9 55 56 interrupt-names: 57 minItems: 1 58 maxItems: 9 59 60 iommu-map: 61 minItems: 1 62 maxItems: 16 63 64 # Common definitions for clocks, clock-names and reset. 65 # Platform constraints are described later. 66 clocks: 67 minItems: 3 68 maxItems: 13 69 70 clock-names: 71 minItems: 3 72 maxItems: 13 73 74 dma-coherent: true 75 76 interconnects: 77 maxItems: 2 78 79 interconnect-names: 80 items: 81 - const: pcie-mem 82 - const: cpu-pcie 83 84 resets: 85 minItems: 1 86 maxItems: 12 87 88 reset-names: 89 minItems: 1 90 maxItems: 12 91 92 vdda-supply: 93 description: A phandle to the core analog power supply 94 95 vdda_phy-supply: 96 description: A phandle to the core analog power supply for PHY 97 98 vdda_refclk-supply: 99 description: A phandle to the core analog power supply for IC which generates reference clock 100 101 vddpe-3v3-supply: 102 description: A phandle to the PCIe endpoint power supply 103 104 phys: 105 maxItems: 1 106 107 phy-names: 108 items: 109 - const: pciephy 110 111 power-domains: 112 maxItems: 1 113 114 perst-gpios: 115 description: GPIO controlled connection to PERST# signal 116 maxItems: 1 117 118 required-opps: 119 maxItems: 1 120 121 wake-gpios: 122 description: GPIO controlled connection to WAKE# signal 123 maxItems: 1 124 125required: 126 - compatible 127 - reg 128 - reg-names 129 - interrupt-map-mask 130 - interrupt-map 131 - clocks 132 - clock-names 133 134anyOf: 135 - required: 136 - interrupts 137 - interrupt-names 138 - "#interrupt-cells" 139 - required: 140 - msi-map 141 142allOf: 143 - $ref: /schemas/pci/pci-host-bridge.yaml# 144 - if: 145 properties: 146 compatible: 147 contains: 148 enum: 149 - qcom,pcie-apq8064 150 - qcom,pcie-ipq4019 151 - qcom,pcie-ipq8064 152 - qcom,pcie-ipq8064v2 153 - qcom,pcie-ipq8074 154 - qcom,pcie-qcs404 155 then: 156 properties: 157 reg: 158 minItems: 4 159 maxItems: 4 160 reg-names: 161 items: 162 - const: dbi # DesignWare PCIe registers 163 - const: elbi # External local bus interface registers 164 - const: parf # Qualcomm specific registers 165 - const: config # PCIe configuration space 166 167 - if: 168 properties: 169 compatible: 170 contains: 171 enum: 172 - qcom,pcie-ipq5018 173 - qcom,pcie-ipq6018 174 - qcom,pcie-ipq8074-gen3 175 - qcom,pcie-ipq9574 176 then: 177 properties: 178 reg: 179 minItems: 5 180 maxItems: 6 181 reg-names: 182 minItems: 5 183 items: 184 - const: dbi # DesignWare PCIe registers 185 - const: elbi # External local bus interface registers 186 - const: atu # ATU address space 187 - const: parf # Qualcomm specific registers 188 - const: config # PCIe configuration space 189 - const: mhi # MHI registers 190 191 - if: 192 properties: 193 compatible: 194 contains: 195 enum: 196 - qcom,pcie-apq8084 197 - qcom,pcie-msm8996 198 - qcom,pcie-sdm845 199 then: 200 properties: 201 reg: 202 minItems: 4 203 maxItems: 5 204 reg-names: 205 minItems: 4 206 items: 207 - const: parf # Qualcomm specific registers 208 - const: dbi # DesignWare PCIe registers 209 - const: elbi # External local bus interface registers 210 - const: config # PCIe configuration space 211 - const: mhi # MHI registers 212 213 - if: 214 properties: 215 compatible: 216 contains: 217 enum: 218 - qcom,pcie-sdx55 219 then: 220 properties: 221 reg: 222 minItems: 5 223 maxItems: 6 224 reg-names: 225 minItems: 5 226 items: 227 - const: parf # Qualcomm specific registers 228 - const: dbi # DesignWare PCIe registers 229 - const: elbi # External local bus interface registers 230 - const: atu # ATU address space 231 - const: config # PCIe configuration space 232 - const: mhi # MHI registers 233 234 - if: 235 properties: 236 compatible: 237 contains: 238 enum: 239 - qcom,pcie-apq8064 240 - qcom,pcie-ipq8064 241 - qcom,pcie-ipq8064v2 242 then: 243 properties: 244 clocks: 245 minItems: 3 246 maxItems: 5 247 clock-names: 248 minItems: 3 249 items: 250 - const: core # Clocks the pcie hw block 251 - const: iface # Configuration AHB clock 252 - const: phy # Clocks the pcie PHY block 253 - const: aux # Clocks the pcie AUX block, not on apq8064 254 - const: ref # Clocks the pcie ref block, not on apq8064 255 resets: 256 minItems: 5 257 maxItems: 6 258 reset-names: 259 minItems: 5 260 items: 261 - const: axi # AXI reset 262 - const: ahb # AHB reset 263 - const: por # POR reset 264 - const: pci # PCI reset 265 - const: phy # PHY reset 266 - const: ext # EXT reset, not on apq8064 267 required: 268 - vdda-supply 269 - vdda_phy-supply 270 - vdda_refclk-supply 271 272 - if: 273 properties: 274 compatible: 275 contains: 276 enum: 277 - qcom,pcie-apq8084 278 then: 279 properties: 280 clocks: 281 minItems: 4 282 maxItems: 4 283 clock-names: 284 items: 285 - const: iface # Configuration AHB clock 286 - const: master_bus # Master AXI clock 287 - const: slave_bus # Slave AXI clock 288 - const: aux # Auxiliary (AUX) clock 289 resets: 290 maxItems: 1 291 reset-names: 292 items: 293 - const: core # Core reset 294 295 - if: 296 properties: 297 compatible: 298 contains: 299 enum: 300 - qcom,pcie-ipq4019 301 then: 302 properties: 303 clocks: 304 minItems: 3 305 maxItems: 3 306 clock-names: 307 items: 308 - const: aux # Auxiliary (AUX) clock 309 - const: master_bus # Master AXI clock 310 - const: slave_bus # Slave AXI clock 311 resets: 312 minItems: 12 313 maxItems: 12 314 reset-names: 315 items: 316 - const: axi_m # AXI master reset 317 - const: axi_s # AXI slave reset 318 - const: pipe # PIPE reset 319 - const: axi_m_vmid # VMID reset 320 - const: axi_s_xpu # XPU reset 321 - const: parf # PARF reset 322 - const: phy # PHY reset 323 - const: axi_m_sticky # AXI sticky reset 324 - const: pipe_sticky # PIPE sticky reset 325 - const: pwr # PWR reset 326 - const: ahb # AHB reset 327 - const: phy_ahb # PHY AHB reset 328 329 - if: 330 properties: 331 compatible: 332 contains: 333 enum: 334 - qcom,pcie-ipq5018 335 then: 336 properties: 337 clocks: 338 minItems: 6 339 maxItems: 6 340 clock-names: 341 items: 342 - const: iface # PCIe to SysNOC BIU clock 343 - const: axi_m # AXI Master clock 344 - const: axi_s # AXI Slave clock 345 - const: ahb # AHB clock 346 - const: aux # Auxiliary clock 347 - const: axi_bridge # AXI bridge clock 348 resets: 349 minItems: 8 350 maxItems: 8 351 reset-names: 352 items: 353 - const: pipe # PIPE reset 354 - const: sleep # Sleep reset 355 - const: sticky # Core sticky reset 356 - const: axi_m # AXI master reset 357 - const: axi_s # AXI slave reset 358 - const: ahb # AHB reset 359 - const: axi_m_sticky # AXI master sticky reset 360 - const: axi_s_sticky # AXI slave sticky reset 361 interrupts: 362 minItems: 9 363 maxItems: 9 364 interrupt-names: 365 items: 366 - const: msi0 367 - const: msi1 368 - const: msi2 369 - const: msi3 370 - const: msi4 371 - const: msi5 372 - const: msi6 373 - const: msi7 374 - const: global 375 376 - if: 377 properties: 378 compatible: 379 contains: 380 enum: 381 - qcom,pcie-msm8996 382 then: 383 properties: 384 clocks: 385 minItems: 5 386 maxItems: 5 387 clock-names: 388 items: 389 - const: pipe # Pipe Clock driving internal logic 390 - const: aux # Auxiliary (AUX) clock 391 - const: cfg # Configuration clock 392 - const: bus_master # Master AXI clock 393 - const: bus_slave # Slave AXI clock 394 resets: false 395 reset-names: false 396 397 - if: 398 properties: 399 compatible: 400 contains: 401 enum: 402 - qcom,pcie-ipq8074 403 then: 404 properties: 405 clocks: 406 minItems: 5 407 maxItems: 5 408 clock-names: 409 items: 410 - const: iface # PCIe to SysNOC BIU clock 411 - const: axi_m # AXI Master clock 412 - const: axi_s # AXI Slave clock 413 - const: ahb # AHB clock 414 - const: aux # Auxiliary clock 415 resets: 416 minItems: 7 417 maxItems: 7 418 reset-names: 419 items: 420 - const: pipe # PIPE reset 421 - const: sleep # Sleep reset 422 - const: sticky # Core Sticky reset 423 - const: axi_m # AXI Master reset 424 - const: axi_s # AXI Slave reset 425 - const: ahb # AHB Reset 426 - const: axi_m_sticky # AXI Master Sticky reset 427 428 - if: 429 properties: 430 compatible: 431 contains: 432 enum: 433 - qcom,pcie-ipq6018 434 - qcom,pcie-ipq8074-gen3 435 then: 436 properties: 437 clocks: 438 minItems: 5 439 maxItems: 5 440 clock-names: 441 items: 442 - const: iface # PCIe to SysNOC BIU clock 443 - const: axi_m # AXI Master clock 444 - const: axi_s # AXI Slave clock 445 - const: axi_bridge # AXI bridge clock 446 - const: rchng 447 resets: 448 minItems: 8 449 maxItems: 8 450 reset-names: 451 items: 452 - const: pipe # PIPE reset 453 - const: sleep # Sleep reset 454 - const: sticky # Core Sticky reset 455 - const: axi_m # AXI Master reset 456 - const: axi_s # AXI Slave reset 457 - const: ahb # AHB Reset 458 - const: axi_m_sticky # AXI Master Sticky reset 459 - const: axi_s_sticky # AXI Slave Sticky reset 460 461 - if: 462 properties: 463 compatible: 464 contains: 465 enum: 466 - qcom,pcie-ipq9574 467 then: 468 properties: 469 clocks: 470 minItems: 6 471 maxItems: 6 472 clock-names: 473 items: 474 - const: axi_m # AXI Master clock 475 - const: axi_s # AXI Slave clock 476 - const: axi_bridge 477 - const: rchng 478 - const: ahb 479 - const: aux 480 481 resets: 482 minItems: 8 483 maxItems: 8 484 reset-names: 485 items: 486 - const: pipe # PIPE reset 487 - const: sticky # Core Sticky reset 488 - const: axi_s_sticky # AXI Slave Sticky reset 489 - const: axi_s # AXI Slave reset 490 - const: axi_m_sticky # AXI Master Sticky reset 491 - const: axi_m # AXI Master reset 492 - const: aux # AUX Reset 493 - const: ahb # AHB Reset 494 495 interrupts: 496 minItems: 8 497 interrupt-names: 498 minItems: 8 499 items: 500 - const: msi0 501 - const: msi1 502 - const: msi2 503 - const: msi3 504 - const: msi4 505 - const: msi5 506 - const: msi6 507 - const: msi7 508 - const: global 509 510 - if: 511 properties: 512 compatible: 513 contains: 514 enum: 515 - qcom,pcie-qcs404 516 then: 517 properties: 518 clocks: 519 minItems: 4 520 maxItems: 4 521 clock-names: 522 items: 523 - const: iface # AHB clock 524 - const: aux # Auxiliary clock 525 - const: master_bus # AXI Master clock 526 - const: slave_bus # AXI Slave clock 527 resets: 528 minItems: 6 529 maxItems: 6 530 reset-names: 531 items: 532 - const: axi_m # AXI Master reset 533 - const: axi_s # AXI Slave reset 534 - const: axi_m_sticky # AXI Master Sticky reset 535 - const: pipe_sticky # PIPE sticky reset 536 - const: pwr # PWR reset 537 - const: ahb # AHB reset 538 539 - if: 540 properties: 541 compatible: 542 contains: 543 enum: 544 - qcom,pcie-sdm845 545 then: 546 oneOf: 547 # Unfortunately the "optional" ref clock is used in the middle of the list 548 - properties: 549 clocks: 550 minItems: 8 551 maxItems: 8 552 clock-names: 553 items: 554 - const: pipe # PIPE clock 555 - const: aux # Auxiliary clock 556 - const: cfg # Configuration clock 557 - const: bus_master # Master AXI clock 558 - const: bus_slave # Slave AXI clock 559 - const: slave_q2a # Slave Q2A clock 560 - const: ref # REFERENCE clock 561 - const: tbu # PCIe TBU clock 562 - properties: 563 clocks: 564 minItems: 7 565 maxItems: 7 566 clock-names: 567 items: 568 - const: pipe # PIPE clock 569 - const: aux # Auxiliary clock 570 - const: cfg # Configuration clock 571 - const: bus_master # Master AXI clock 572 - const: bus_slave # Slave AXI clock 573 - const: slave_q2a # Slave Q2A clock 574 - const: tbu # PCIe TBU clock 575 properties: 576 resets: 577 maxItems: 1 578 reset-names: 579 items: 580 - const: pci # PCIe core reset 581 582 - if: 583 properties: 584 compatible: 585 contains: 586 enum: 587 - qcom,pcie-sdx55 588 then: 589 properties: 590 clocks: 591 minItems: 7 592 maxItems: 7 593 clock-names: 594 items: 595 - const: pipe # PIPE clock 596 - const: aux # Auxiliary clock 597 - const: cfg # Configuration clock 598 - const: bus_master # Master AXI clock 599 - const: bus_slave # Slave AXI clock 600 - const: slave_q2a # Slave Q2A clock 601 - const: sleep # PCIe Sleep clock 602 resets: 603 maxItems: 1 604 reset-names: 605 items: 606 - const: pci # PCIe core reset 607 608 - if: 609 not: 610 properties: 611 compatible: 612 contains: 613 enum: 614 - qcom,pcie-apq8064 615 - qcom,pcie-ipq4019 616 - qcom,pcie-ipq5018 617 - qcom,pcie-ipq8064 618 - qcom,pcie-ipq8064v2 619 - qcom,pcie-ipq8074 620 - qcom,pcie-ipq8074-gen3 621 - qcom,pcie-ipq9574 622 - qcom,pcie-qcs404 623 then: 624 required: 625 - power-domains 626 627 - if: 628 not: 629 properties: 630 compatible: 631 contains: 632 enum: 633 - qcom,pcie-msm8996 634 then: 635 required: 636 - resets 637 - reset-names 638 639 - if: 640 properties: 641 compatible: 642 contains: 643 enum: 644 - qcom,pcie-ipq6018 645 - qcom,pcie-ipq8074 646 - qcom,pcie-ipq8074-gen3 647 - qcom,pcie-msm8996 648 - qcom,pcie-msm8998 649 - qcom,pcie-sdm845 650 then: 651 oneOf: 652 - properties: 653 interrupts: 654 maxItems: 1 655 interrupt-names: 656 items: 657 - const: msi 658 - properties: 659 interrupts: 660 minItems: 8 661 maxItems: 9 662 interrupt-names: 663 minItems: 8 664 items: 665 - const: msi0 666 - const: msi1 667 - const: msi2 668 - const: msi3 669 - const: msi4 670 - const: msi5 671 - const: msi6 672 - const: msi7 673 - const: global 674 675 - if: 676 properties: 677 compatible: 678 contains: 679 enum: 680 - qcom,pcie-apq8064 681 - qcom,pcie-apq8084 682 - qcom,pcie-ipq4019 683 - qcom,pcie-ipq8064 684 - qcom,pcie-ipq8064-v2 685 - qcom,pcie-qcs404 686 then: 687 properties: 688 interrupts: 689 maxItems: 1 690 interrupt-names: 691 items: 692 - const: msi 693 694unevaluatedProperties: false 695 696examples: 697 - | 698 #include <dt-bindings/interrupt-controller/arm-gic.h> 699 pcie@1b500000 { 700 compatible = "qcom,pcie-ipq8064"; 701 reg = <0x1b500000 0x1000>, 702 <0x1b502000 0x80>, 703 <0x1b600000 0x100>, 704 <0x0ff00000 0x100000>; 705 reg-names = "dbi", "elbi", "parf", "config"; 706 device_type = "pci"; 707 linux,pci-domain = <0>; 708 bus-range = <0x00 0xff>; 709 num-lanes = <1>; 710 #address-cells = <3>; 711 #size-cells = <2>; 712 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>, 713 <0x82000000 0 0 0x08000000 0 0x07e00000>; 714 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 715 interrupt-names = "msi"; 716 #interrupt-cells = <1>; 717 interrupt-map-mask = <0 0 0 0x7>; 718 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, 719 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, 720 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, 721 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; 722 clocks = <&gcc 41>, 723 <&gcc 43>, 724 <&gcc 44>, 725 <&gcc 42>, 726 <&gcc 248>; 727 clock-names = "core", "iface", "phy", "aux", "ref"; 728 resets = <&gcc 27>, 729 <&gcc 26>, 730 <&gcc 25>, 731 <&gcc 24>, 732 <&gcc 23>, 733 <&gcc 22>; 734 reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; 735 pinctrl-0 = <&pcie_pins_default>; 736 pinctrl-names = "default"; 737 vdda-supply = <&pm8921_s3>; 738 vdda_phy-supply = <&pm8921_lvs6>; 739 vdda_refclk-supply = <&ext_3p3v>; 740 }; 741 - | 742 #include <dt-bindings/interrupt-controller/arm-gic.h> 743 #include <dt-bindings/gpio/gpio.h> 744 pcie@fc520000 { 745 compatible = "qcom,pcie-apq8084"; 746 reg = <0xfc520000 0x2000>, 747 <0xff000000 0x1000>, 748 <0xff001000 0x1000>, 749 <0xff002000 0x2000>; 750 reg-names = "parf", "dbi", "elbi", "config"; 751 device_type = "pci"; 752 linux,pci-domain = <0>; 753 bus-range = <0x00 0xff>; 754 num-lanes = <1>; 755 #address-cells = <3>; 756 #size-cells = <2>; 757 ranges = <0x81000000 0 0 0xff200000 0 0x00100000>, 758 <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; 759 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 760 interrupt-names = "msi"; 761 #interrupt-cells = <1>; 762 interrupt-map-mask = <0 0 0 0x7>; 763 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, 764 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, 765 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, 766 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; 767 clocks = <&gcc 324>, 768 <&gcc 325>, 769 <&gcc 327>, 770 <&gcc 323>; 771 clock-names = "iface", "master_bus", "slave_bus", "aux"; 772 resets = <&gcc 81>; 773 reset-names = "core"; 774 power-domains = <&gcc 1>; 775 vdda-supply = <&pma8084_l3>; 776 phys = <&pciephy0>; 777 phy-names = "pciephy"; 778 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>; 779 pinctrl-0 = <&pcie0_pins_default>; 780 pinctrl-names = "default"; 781 }; 782... 783