xref: /linux/Documentation/devicetree/bindings/pci/pci-armada8k.txt (revision e9f0878c4b2004ac19581274c1ae4c61ae3ca70e)
1* Marvell Armada 7K/8K PCIe interface
2
3This PCIe host controller is based on the Synopsys DesignWare PCIe IP
4and thus inherits all the common properties defined in designware-pcie.txt.
5
6Required properties:
7- compatible: "marvell,armada8k-pcie"
8- reg: must contain two register regions
9   - the control register region
10   - the config space region
11- reg-names:
12   - "ctrl" for the control register region
13   - "config" for the config space region
14- interrupts: Interrupt specifier for the PCIe controler
15- clocks: reference to the PCIe controller clocks
16- clock-names: mandatory if there is a second clock, in this case the
17   name must be "core" for the first clock and "reg" for the second
18   one
19
20Example:
21
22	pcie@f2600000 {
23		compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
24		reg = <0 0xf2600000 0 0x10000>, <0 0xf6f00000 0 0x80000>;
25		reg-names = "ctrl", "config";
26		#address-cells = <3>;
27		#size-cells = <2>;
28		#interrupt-cells = <1>;
29		device_type = "pci";
30		dma-coherent;
31
32		bus-range = <0 0xff>;
33		ranges = <0x81000000 0 0xf9000000 0  0xf9000000 0 0x10000	/* downstream I/O */
34			  0x82000000 0 0xf6000000 0  0xf6000000 0 0xf00000>;	/* non-prefetchable memory */
35		interrupt-map-mask = <0 0 0 0>;
36		interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
37		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
38		num-lanes = <1>;
39		clocks = <&cpm_syscon0 1 13>;
40	};
41