xref: /linux/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml (revision ae22a94997b8a03dcb3c922857c203246711f9d4) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-host.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Cadence PCIe host controller
8
9maintainers:
10  - Tom Joseph <tjoseph@cadence.com>
11
12allOf:
13  - $ref: /schemas/pci/pci-bus.yaml#
14  - $ref: cdns-pcie-host.yaml#
15
16properties:
17  compatible:
18    const: cdns,cdns-pcie-host
19
20  reg:
21    maxItems: 2
22
23  reg-names:
24    items:
25      - const: reg
26      - const: cfg
27
28  msi-parent: true
29
30required:
31  - reg
32  - reg-names
33
34unevaluatedProperties: false
35
36examples:
37  - |
38    bus {
39        #address-cells = <2>;
40        #size-cells = <2>;
41
42        pcie@fb000000 {
43            compatible = "cdns,cdns-pcie-host";
44            device_type = "pci";
45            #address-cells = <3>;
46            #size-cells = <2>;
47            bus-range = <0x0 0xff>;
48            linux,pci-domain = <0>;
49            vendor-id = <0x17cd>;
50            device-id = <0x0200>;
51
52            reg = <0x0 0xfb000000  0x0 0x01000000>,
53                  <0x0 0x41000000  0x0 0x00001000>;
54            reg-names = "reg", "cfg";
55
56            ranges = <0x02000000 0x0 0x42000000  0x0 0x42000000  0x0 0x1000000>,
57                     <0x01000000 0x0 0x43000000  0x0 0x43000000  0x0 0x0010000>;
58            dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
59
60            #interrupt-cells = <0x1>;
61
62            interrupt-map = <0x0 0x0 0x0  0x1  &gic  0x0 0x0 0x0 14 0x1>,
63                 <0x0 0x0 0x0  0x2  &gic  0x0 0x0 0x0 15 0x1>,
64                 <0x0 0x0 0x0  0x3  &gic  0x0 0x0 0x0 16 0x1>,
65                 <0x0 0x0 0x0  0x4  &gic  0x0 0x0 0x0 17 0x1>;
66
67            interrupt-map-mask = <0x0 0x0 0x0  0x7>;
68
69            msi-parent = <&its_pci>;
70
71            phys = <&pcie_phy0>;
72            phy-names = "pcie-phy";
73        };
74    };
75...
76