xref: /linux/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml (revision bdd1a21b52557ea8f61d0a5dc2f77151b576eb70) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Brcmstb PCIe Host Controller Device Tree Bindings
8
9maintainers:
10  - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
11
12properties:
13  compatible:
14    items:
15      - enum:
16          - brcm,bcm2711-pcie # The Raspberry Pi 4
17          - brcm,bcm4908-pcie
18          - brcm,bcm7211-pcie # Broadcom STB version of RPi4
19          - brcm,bcm7278-pcie # Broadcom 7278 Arm
20          - brcm,bcm7216-pcie # Broadcom 7216 Arm
21          - brcm,bcm7445-pcie # Broadcom 7445 Arm
22
23  reg:
24    maxItems: 1
25
26  interrupts:
27    minItems: 1
28    items:
29      - description: PCIe host controller
30      - description: builtin MSI controller
31
32  interrupt-names:
33    minItems: 1
34    items:
35      - const: pcie
36      - const: msi
37
38  ranges:
39    minItems: 1
40    maxItems: 4
41
42  dma-ranges:
43    minItems: 1
44    maxItems: 6
45
46  clocks:
47    maxItems: 1
48
49  clock-names:
50    items:
51      - const: sw_pcie
52
53  msi-controller:
54    description: Identifies the node as an MSI controller.
55
56  msi-parent:
57    description: MSI controller the device is capable of using.
58
59  brcm,enable-ssc:
60    description: Indicates usage of spread-spectrum clocking.
61    type: boolean
62
63  aspm-no-l0s: true
64
65  brcm,scb-sizes:
66    description: u64 giving the 64bit PCIe memory
67      viewport size of a memory controller.  There may be up to
68      three controllers, and each size must be a power of two
69      with a size greater or equal to the amount of memory the
70      controller supports.  Note that each memory controller
71      may have two component regions -- base and extended -- so
72      this information cannot be deduced from the dma-ranges.
73    $ref: /schemas/types.yaml#/definitions/uint64-array
74    items:
75      minItems: 1
76      maxItems: 3
77
78required:
79  - reg
80  - ranges
81  - dma-ranges
82  - "#interrupt-cells"
83  - interrupts
84  - interrupt-names
85  - interrupt-map-mask
86  - interrupt-map
87  - msi-controller
88
89allOf:
90  - $ref: /schemas/pci/pci-bus.yaml#
91  - if:
92      properties:
93        compatible:
94          contains:
95            const: brcm,bcm4908-pcie
96    then:
97      properties:
98        resets:
99          items:
100            - description: reset controller handling the PERST# signal
101
102        reset-names:
103          items:
104            - const: perst
105
106      required:
107        - resets
108        - reset-names
109  - if:
110      properties:
111        compatible:
112          contains:
113            const: brcm,bcm7216-pcie
114    then:
115      properties:
116        resets:
117          items:
118            - description: phandle pointing to the RESCAL reset controller
119
120        reset-names:
121          items:
122            - const: rescal
123
124      required:
125        - resets
126        - reset-names
127
128unevaluatedProperties: false
129
130examples:
131  - |
132    #include <dt-bindings/interrupt-controller/irq.h>
133    #include <dt-bindings/interrupt-controller/arm-gic.h>
134
135    scb {
136            #address-cells = <2>;
137            #size-cells = <1>;
138            pcie0: pcie@7d500000 {
139                    compatible = "brcm,bcm2711-pcie";
140                    reg = <0x0 0x7d500000 0x9310>;
141                    device_type = "pci";
142                    #address-cells = <3>;
143                    #size-cells = <2>;
144                    #interrupt-cells = <1>;
145                    interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
146                                 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
147                    interrupt-names = "pcie", "msi";
148                    interrupt-map-mask = <0x0 0x0 0x0 0x7>;
149                    interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
150                    msi-parent = <&pcie0>;
151                    msi-controller;
152                    ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
153                    dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>,
154                                 <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>;
155                    brcm,enable-ssc;
156                    brcm,scb-sizes =  <0x0000000080000000 0x0000000080000000>;
157            };
158    };
159