1*dff07b5eSMatthew Gerlach# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*dff07b5eSMatthew Gerlach# Copyright (C) 2015, 2024, Intel Corporation 3*dff07b5eSMatthew Gerlach%YAML 1.2 4*dff07b5eSMatthew Gerlach--- 5*dff07b5eSMatthew Gerlach$id: http://devicetree.org/schemas/altr,msi-controller.yaml# 6*dff07b5eSMatthew Gerlach$schema: http://devicetree.org/meta-schemas/core.yaml# 7*dff07b5eSMatthew Gerlach 8*dff07b5eSMatthew Gerlachtitle: Altera PCIe MSI controller 9*dff07b5eSMatthew Gerlach 10*dff07b5eSMatthew Gerlachmaintainers: 11*dff07b5eSMatthew Gerlach - Matthew Gerlach <matthew.gerlach@linux.intel.com> 12*dff07b5eSMatthew Gerlach 13*dff07b5eSMatthew Gerlachproperties: 14*dff07b5eSMatthew Gerlach compatible: 15*dff07b5eSMatthew Gerlach enum: 16*dff07b5eSMatthew Gerlach - altr,msi-1.0 17*dff07b5eSMatthew Gerlach 18*dff07b5eSMatthew Gerlach reg: 19*dff07b5eSMatthew Gerlach items: 20*dff07b5eSMatthew Gerlach - description: CSR registers 21*dff07b5eSMatthew Gerlach - description: Vectors slave port region 22*dff07b5eSMatthew Gerlach 23*dff07b5eSMatthew Gerlach reg-names: 24*dff07b5eSMatthew Gerlach items: 25*dff07b5eSMatthew Gerlach - const: csr 26*dff07b5eSMatthew Gerlach - const: vector_slave 27*dff07b5eSMatthew Gerlach 28*dff07b5eSMatthew Gerlach interrupts: 29*dff07b5eSMatthew Gerlach maxItems: 1 30*dff07b5eSMatthew Gerlach 31*dff07b5eSMatthew Gerlach msi-controller: true 32*dff07b5eSMatthew Gerlach 33*dff07b5eSMatthew Gerlach num-vectors: 34*dff07b5eSMatthew Gerlach description: number of vectors 35*dff07b5eSMatthew Gerlach $ref: /schemas/types.yaml#/definitions/uint32 36*dff07b5eSMatthew Gerlach minimum: 1 37*dff07b5eSMatthew Gerlach maximum: 32 38*dff07b5eSMatthew Gerlach 39*dff07b5eSMatthew Gerlachrequired: 40*dff07b5eSMatthew Gerlach - compatible 41*dff07b5eSMatthew Gerlach - reg 42*dff07b5eSMatthew Gerlach - reg-names 43*dff07b5eSMatthew Gerlach - interrupts 44*dff07b5eSMatthew Gerlach - msi-controller 45*dff07b5eSMatthew Gerlach - num-vectors 46*dff07b5eSMatthew Gerlach 47*dff07b5eSMatthew GerlachallOf: 48*dff07b5eSMatthew Gerlach - $ref: /schemas/interrupt-controller/msi-controller.yaml# 49*dff07b5eSMatthew Gerlach 50*dff07b5eSMatthew GerlachunevaluatedProperties: false 51*dff07b5eSMatthew Gerlach 52*dff07b5eSMatthew Gerlachexamples: 53*dff07b5eSMatthew Gerlach - | 54*dff07b5eSMatthew Gerlach #include <dt-bindings/interrupt-controller/arm-gic.h> 55*dff07b5eSMatthew Gerlach #include <dt-bindings/interrupt-controller/irq.h> 56*dff07b5eSMatthew Gerlach msi@ff200000 { 57*dff07b5eSMatthew Gerlach compatible = "altr,msi-1.0"; 58*dff07b5eSMatthew Gerlach reg = <0xff200000 0x00000010>, 59*dff07b5eSMatthew Gerlach <0xff200010 0x00000080>; 60*dff07b5eSMatthew Gerlach reg-names = "csr", "vector_slave"; 61*dff07b5eSMatthew Gerlach interrupt-parent = <&hps_0_arm_gic_0>; 62*dff07b5eSMatthew Gerlach interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 63*dff07b5eSMatthew Gerlach msi-controller; 64*dff07b5eSMatthew Gerlach num-vectors = <32>; 65*dff07b5eSMatthew Gerlach }; 66