1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale i.MX On-Chip OTP Controller (OCOTP) 8 9maintainers: 10 - Shawn Guo <shawnguo@kernel.org> 11 - Sascha Hauer <s.hauer@pengutronix.de> 12 - Fabio Estevam <festevam@gmail.com> 13 14description: | 15 This binding represents the on-chip eFuse OTP controller found on 16 i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL, 17 i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN i.MX8MP, i.MX93, i.MX94, 18 and i.MX95. 19 20allOf: 21 - $ref: nvmem.yaml# 22 - $ref: nvmem-deprecated-cells.yaml# 23 24properties: 25 compatible: 26 oneOf: 27 - items: 28 - enum: 29 - fsl,imx6q-ocotp 30 - fsl,imx6sl-ocotp 31 - fsl,imx6sx-ocotp 32 - fsl,imx6ul-ocotp 33 - fsl,imx6ull-ocotp 34 - fsl,imx7d-ocotp 35 - fsl,imx6sll-ocotp 36 - fsl,imx7ulp-ocotp 37 - fsl,imx8mq-ocotp 38 - fsl,imx8mm-ocotp 39 - fsl,imx93-ocotp 40 - fsl,imx94-ocotp 41 - fsl,imx95-ocotp 42 - const: syscon 43 - items: 44 - enum: 45 - fsl,imx8mn-ocotp 46 # i.MX8MP not really compatible with fsl,imx8mm-ocotp, however 47 # the code for getting SoC revision depends on fsl,imx8mm-ocotp 48 # compatible. 49 - fsl,imx8mp-ocotp 50 - const: fsl,imx8mm-ocotp 51 - const: syscon 52 53 reg: 54 maxItems: 1 55 56 clocks: 57 maxItems: 1 58 59required: 60 - "#address-cells" 61 - "#size-cells" 62 - compatible 63 - reg 64 65unevaluatedProperties: false 66 67examples: 68 - | 69 #include <dt-bindings/clock/imx6sx-clock.h> 70 71 ocotp: efuse@21bc000 { 72 #address-cells = <1>; 73 #size-cells = <1>; 74 compatible = "fsl,imx6sx-ocotp", "syscon"; 75 reg = <0x021bc000 0x4000>; 76 clocks = <&clks IMX6SX_CLK_OCOTP>; 77 78 cpu_speed_grade: speed-grade@10 { 79 reg = <0x10 4>; 80 }; 81 82 tempmon_calib: calib@38 { 83 reg = <0x38 4>; 84 }; 85 86 tempmon_temp_grade: temp-grade@20 { 87 reg = <0x20 4>; 88 }; 89 }; 90 91... 92