1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale i.MX On-Chip OTP Controller (OCOTP) 8 9maintainers: 10 - Shawn Guo <shawnguo@kernel.org> 11 - Sascha Hauer <s.hauer@pengutronix.de> 12 - Fabio Estevam <festevam@gmail.com> 13 14description: | 15 This binding represents the on-chip eFuse OTP controller found on 16 i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL, 17 i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN i.MX8MP and i.MX93 SoCs. 18 19allOf: 20 - $ref: nvmem.yaml# 21 - $ref: nvmem-deprecated-cells.yaml# 22 23properties: 24 compatible: 25 oneOf: 26 - items: 27 - enum: 28 - fsl,imx6q-ocotp 29 - fsl,imx6sl-ocotp 30 - fsl,imx6sx-ocotp 31 - fsl,imx6ul-ocotp 32 - fsl,imx6ull-ocotp 33 - fsl,imx7d-ocotp 34 - fsl,imx6sll-ocotp 35 - fsl,imx7ulp-ocotp 36 - fsl,imx8mq-ocotp 37 - fsl,imx8mm-ocotp 38 - fsl,imx93-ocotp 39 - const: syscon 40 - items: 41 - enum: 42 - fsl,imx8mn-ocotp 43 # i.MX8MP not really compatible with fsl,imx8mm-ocotp, however 44 # the code for getting SoC revision depends on fsl,imx8mm-ocotp 45 # compatible. 46 - fsl,imx8mp-ocotp 47 - const: fsl,imx8mm-ocotp 48 - const: syscon 49 50 reg: 51 maxItems: 1 52 53 clocks: 54 maxItems: 1 55 56required: 57 - "#address-cells" 58 - "#size-cells" 59 - compatible 60 - reg 61 62unevaluatedProperties: false 63 64examples: 65 - | 66 #include <dt-bindings/clock/imx6sx-clock.h> 67 68 ocotp: efuse@21bc000 { 69 #address-cells = <1>; 70 #size-cells = <1>; 71 compatible = "fsl,imx6sx-ocotp", "syscon"; 72 reg = <0x021bc000 0x4000>; 73 clocks = <&clks IMX6SX_CLK_OCOTP>; 74 75 cpu_speed_grade: speed-grade@10 { 76 reg = <0x10 4>; 77 }; 78 79 tempmon_calib: calib@38 { 80 reg = <0x38 4>; 81 }; 82 83 tempmon_temp_grade: temp-grade@20 { 84 reg = <0x20 4>; 85 }; 86 }; 87 88... 89