1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale i.MX On-Chip OTP Controller (OCOTP) 8 9maintainers: 10 - Anson Huang <Anson.Huang@nxp.com> 11 12description: | 13 This binding represents the on-chip eFuse OTP controller found on 14 i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL, 15 i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN i.MX8MP and i.MX93 SoCs. 16 17allOf: 18 - $ref: nvmem.yaml# 19 - $ref: nvmem-deprecated-cells.yaml# 20 21properties: 22 compatible: 23 oneOf: 24 - items: 25 - enum: 26 - fsl,imx6q-ocotp 27 - fsl,imx6sl-ocotp 28 - fsl,imx6sx-ocotp 29 - fsl,imx6ul-ocotp 30 - fsl,imx6ull-ocotp 31 - fsl,imx7d-ocotp 32 - fsl,imx6sll-ocotp 33 - fsl,imx7ulp-ocotp 34 - fsl,imx8mq-ocotp 35 - fsl,imx8mm-ocotp 36 - fsl,imx93-ocotp 37 - const: syscon 38 - items: 39 - enum: 40 - fsl,imx8mn-ocotp 41 # i.MX8MP not really compatible with fsl,imx8mm-ocotp, however 42 # the code for getting SoC revision depends on fsl,imx8mm-ocotp 43 # compatible. 44 - fsl,imx8mp-ocotp 45 - const: fsl,imx8mm-ocotp 46 - const: syscon 47 48 reg: 49 maxItems: 1 50 51 clocks: 52 maxItems: 1 53 54required: 55 - "#address-cells" 56 - "#size-cells" 57 - compatible 58 - reg 59 60unevaluatedProperties: false 61 62examples: 63 - | 64 #include <dt-bindings/clock/imx6sx-clock.h> 65 66 ocotp: efuse@21bc000 { 67 #address-cells = <1>; 68 #size-cells = <1>; 69 compatible = "fsl,imx6sx-ocotp", "syscon"; 70 reg = <0x021bc000 0x4000>; 71 clocks = <&clks IMX6SX_CLK_OCOTP>; 72 73 cpu_speed_grade: speed-grade@10 { 74 reg = <0x10 4>; 75 }; 76 77 tempmon_calib: calib@38 { 78 reg = <0x38 4>; 79 }; 80 81 tempmon_temp_grade: temp-grade@20 { 82 reg = <0x20 4>; 83 }; 84 }; 85 86... 87