xref: /linux/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml (revision 06a130e42a5bfc84795464bff023bff4c16f58c5) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/nvmem/fsl,layerscape-sfp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Layerscape Security Fuse Processor
8
9maintainers:
10  - Michael Walle <michael@walle.cc>
11
12description: |
13  SFP is the security fuse processor which among other things provides a
14  unique identifier per part.
15
16allOf:
17  - $ref: nvmem.yaml#
18  - $ref: nvmem-deprecated-cells.yaml
19
20properties:
21  compatible:
22    oneOf:
23      - description: Trust architecture 2.1 SFP
24        items:
25          - const: fsl,ls1021a-sfp
26      - description: Trust architecture 3.0 SFP
27        items:
28          - const: fsl,ls1028a-sfp
29
30  reg:
31    maxItems: 1
32
33  clocks:
34    maxItems: 1
35    description:
36      The SFP clock. Typically, this is the platform clock divided by 4.
37
38  clock-names:
39    const: sfp
40
41  ta-prog-sfp-supply:
42    description:
43      The regulator for the TA_PROG_SFP pin. It will be enabled for programming
44      and disabled for reading.
45
46required:
47  - compatible
48  - reg
49  - clock-names
50  - clocks
51
52unevaluatedProperties: false
53
54examples:
55  - |
56    #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
57    efuse@1e80000 {
58        compatible = "fsl,ls1028a-sfp";
59        reg = <0x1e80000 0x8000>;
60        clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
61                            QORIQ_CLK_PLL_DIV(4)>;
62        clock-names = "sfp";
63    };
64