xref: /linux/Documentation/devicetree/bindings/npu/arm,ethos.yaml (revision f6e8dc9edf963dbc99085e54f6ced6da9daa6100) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/npu/arm,ethos.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Arm Ethos U65/U85
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11
12description: >
13  The Arm Ethos-U NPUs are designed for IoT inference applications. The NPUs
14  can accelerate 8-bit and 16-bit integer quantized networks:
15
16    Transformer networks (U85 only)
17    Convolutional Neural Networks (CNN)
18    Recurrent Neural Networks (RNN)
19
20  Further documentation is available here:
21
22    U65 TRM: https://developer.arm.com/documentation/102023/
23    U85 TRM: https://developer.arm.com/documentation/102685/
24
25properties:
26  compatible:
27    oneOf:
28      - items:
29          - enum:
30              - fsl,imx93-npu
31          - const: arm,ethos-u65
32      - items:
33          - {}
34          - const: arm,ethos-u85
35
36  reg:
37    maxItems: 1
38
39  interrupts:
40    maxItems: 1
41
42  clocks:
43    maxItems: 2
44
45  clock-names:
46    items:
47      - const: core
48      - const: apb
49
50  power-domains:
51    maxItems: 1
52
53  sram:
54    maxItems: 1
55
56required:
57  - compatible
58  - reg
59  - interrupts
60  - clocks
61
62additionalProperties: false
63
64examples:
65  - |
66    #include <dt-bindings/interrupt-controller/irq.h>
67    #include <dt-bindings/interrupt-controller/arm-gic.h>
68    #include <dt-bindings/clock/imx93-clock.h>
69
70    npu@4a900000 {
71        compatible = "fsl,imx93-npu", "arm,ethos-u65";
72        reg = <0x4a900000 0x1000>;
73        interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
74        power-domains = <&mlmix>;
75        clocks = <&clk IMX93_CLK_ML>, <&clk IMX93_CLK_ML_APB>;
76        clock-names = "core", "apb";
77        sram = <&sram>;
78    };
79...
80