xref: /linux/Documentation/devicetree/bindings/net/wiznet,w5x00.txt (revision 0898782247ae533d1f4e47a06bc5d4870931b284)
1*0114214eSNicolas Saenz Julienne* Wiznet w5x00
2*0114214eSNicolas Saenz Julienne
3*0114214eSNicolas Saenz JulienneThis is a standalone 10/100 MBit Ethernet controller with SPI interface.
4*0114214eSNicolas Saenz Julienne
5*0114214eSNicolas Saenz JulienneFor each device connected to a SPI bus, define a child node within
6*0114214eSNicolas Saenz Juliennethe SPI master node.
7*0114214eSNicolas Saenz Julienne
8*0114214eSNicolas Saenz JulienneRequired properties:
9*0114214eSNicolas Saenz Julienne- compatible: Should be one of the following strings:
10*0114214eSNicolas Saenz Julienne	      "wiznet,w5100"
11*0114214eSNicolas Saenz Julienne	      "wiznet,w5200"
12*0114214eSNicolas Saenz Julienne	      "wiznet,w5500"
13*0114214eSNicolas Saenz Julienne- reg: Specify the SPI chip select the chip is wired to.
14*0114214eSNicolas Saenz Julienne- interrupts: Specify the interrupt index within the interrupt controller (referred
15*0114214eSNicolas Saenz Julienne              to above in interrupt-parent) and interrupt type. w5x00 natively
16*0114214eSNicolas Saenz Julienne              generates falling edge interrupts, however, additional board logic
17*0114214eSNicolas Saenz Julienne              might invert the signal.
18*0114214eSNicolas Saenz Julienne- pinctrl-names: List of assigned state names, see pinctrl binding documentation.
19*0114214eSNicolas Saenz Julienne- pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,
20*0114214eSNicolas Saenz Julienne             see also generic and your platform specific pinctrl binding
21*0114214eSNicolas Saenz Julienne             documentation.
22*0114214eSNicolas Saenz Julienne
23*0114214eSNicolas Saenz JulienneOptional properties:
24*0114214eSNicolas Saenz Julienne- spi-max-frequency: Maximum frequency of the SPI bus when accessing the w5500.
25*0114214eSNicolas Saenz Julienne  According to the w5500 datasheet, the chip allows a maximum of 80 MHz, however,
26*0114214eSNicolas Saenz Julienne  board designs may need to limit this value.
27*0114214eSNicolas Saenz Julienne- local-mac-address: See ethernet.txt in the same directory.
28*0114214eSNicolas Saenz Julienne
29*0114214eSNicolas Saenz Julienne
30*0114214eSNicolas Saenz JulienneExample (for Raspberry Pi with pin control stuff for GPIO irq):
31*0114214eSNicolas Saenz Julienne
32*0114214eSNicolas Saenz Julienne&spi {
33*0114214eSNicolas Saenz Julienne	ethernet@0: w5500@0 {
34*0114214eSNicolas Saenz Julienne		compatible = "wiznet,w5500";
35*0114214eSNicolas Saenz Julienne		reg = <0>;
36*0114214eSNicolas Saenz Julienne		pinctrl-names = "default";
37*0114214eSNicolas Saenz Julienne		pinctrl-0 = <&eth1_pins>;
38*0114214eSNicolas Saenz Julienne		interrupt-parent = <&gpio>;
39*0114214eSNicolas Saenz Julienne		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
40*0114214eSNicolas Saenz Julienne		spi-max-frequency = <30000000>;
41*0114214eSNicolas Saenz Julienne	};
42*0114214eSNicolas Saenz Julienne};
43*0114214eSNicolas Saenz Julienne
44*0114214eSNicolas Saenz Julienne&gpio {
45*0114214eSNicolas Saenz Julienne	eth1_pins: eth1_pins {
46*0114214eSNicolas Saenz Julienne		brcm,pins = <25>;
47*0114214eSNicolas Saenz Julienne		brcm,function = <0>; /* in */
48*0114214eSNicolas Saenz Julienne		brcm,pull = <0>; /* none */
49*0114214eSNicolas Saenz Julienne	};
50*0114214eSNicolas Saenz Julienne};
51