xref: /linux/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml (revision 001821b0e79716c4e17c71d8e053a23599a7a508) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/wireless/qcom,ath10k.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies ath10k wireless devices
8
9maintainers:
10  - Kalle Valo <kvalo@kernel.org>
11  - Jeff Johnson <jjohnson@kernel.org>
12
13description:
14  Qualcomm Technologies, Inc. IEEE 802.11ac devices.
15
16properties:
17  compatible:
18    enum:
19      - qcom,ath10k # SDIO-based devices
20      - qcom,ipq4019-wifi
21      - qcom,wcn3990-wifi # SNoC-based devices
22
23  reg:
24    maxItems: 1
25
26  reg-names:
27    items:
28      - const: membase
29
30  interrupts:
31    minItems: 12
32    maxItems: 17
33
34  interrupt-names:
35    minItems: 12
36    maxItems: 17
37
38  memory-region:
39    maxItems: 1
40    description:
41      Reference to the MSA memory region used by the Wi-Fi firmware
42      running on the Q6 core.
43
44  iommus:
45    minItems: 1
46    maxItems: 2
47
48  clocks:
49    minItems: 1
50    maxItems: 3
51
52  clock-names:
53    minItems: 1
54    maxItems: 3
55
56  resets:
57    maxItems: 6
58
59  reset-names:
60    items:
61      - const: wifi_cpu_init
62      - const: wifi_radio_srif
63      - const: wifi_radio_warm
64      - const: wifi_radio_cold
65      - const: wifi_core_warm
66      - const: wifi_core_cold
67
68  ext-fem-name:
69    $ref: /schemas/types.yaml#/definitions/string
70    description: Name of external front end module used.
71    enum:
72      - microsemi-lx5586
73      - sky85703-11
74      - sky85803
75
76  firmware-name:
77    maxItems: 1
78    description:
79      If present, a board or platform specific string used to lookup firmware
80      files for the device.
81
82  wifi-firmware:
83    type: object
84    additionalProperties: false
85    description: |
86      The ath10k Wi-Fi node can contain one optional firmware subnode.
87      Firmware subnode is needed when the platform does not have Trustzone.
88    properties:
89      iommus:
90        maxItems: 1
91    required:
92      - iommus
93
94  ieee80211-freq-limit: true
95
96  qcom,ath10k-calibration-data:
97    $ref: /schemas/types.yaml#/definitions/uint8-array
98    description:
99      Calibration data + board-specific data as a byte array. The length
100      can vary between hardware versions.
101
102  qcom,ath10k-calibration-variant:
103    $ref: /schemas/types.yaml#/definitions/string
104    description:
105      Unique variant identifier of the calibration data in board-2.bin
106      for designs with colliding bus and device specific ids
107
108  qcom,ath10k-pre-calibration-data:
109    $ref: /schemas/types.yaml#/definitions/uint8-array
110    description:
111      Pre-calibration data as a byte array. The length can vary between
112      hardware versions.
113
114  qcom,coexist-support:
115    $ref: /schemas/types.yaml#/definitions/uint8
116    enum: [0, 1]
117    description:
118      Indicate coex support by the hardware.
119
120  qcom,coexist-gpio-pin:
121    $ref: /schemas/types.yaml#/definitions/uint32
122    description:
123      COEX GPIO number provided to the Wi-Fi firmware.
124
125  qcom,msa-fixed-perm:
126    type: boolean
127    description:
128      Whether to skip executing an SCM call that reassigns the memory
129      region ownership.
130
131  qcom,smem-states:
132    $ref: /schemas/types.yaml#/definitions/phandle-array
133    description: State bits used by the AP to signal the WLAN Q6.
134    items:
135      - description: Signal bits used to enable/disable low power mode
136                     on WCN in the case of WoW (Wake on Wireless).
137
138  qcom,smem-state-names:
139    description: The names of the state bits used for SMP2P output.
140    items:
141      - const: wlan-smp2p-out
142
143  qcom,snoc-host-cap-8bit-quirk:
144    type: boolean
145    description:
146      Quirk specifying that the firmware expects the 8bit version
147      of the host capability QMI request
148
149  qcom,xo-cal-data:
150    $ref: /schemas/types.yaml#/definitions/uint32
151    description:
152      XO cal offset to be configured in XO trim register.
153
154  vdd-0.8-cx-mx-supply:
155    description: Main logic power rail
156
157  vdd-1.8-xo-supply:
158    description: Crystal oscillator supply
159
160  vdd-1.3-rfa-supply:
161    description: RFA supply
162
163  vdd-3.3-ch0-supply:
164    description: Primary Wi-Fi antenna supply
165
166  vdd-3.3-ch1-supply:
167    description: Secondary Wi-Fi antenna supply
168
169required:
170  - compatible
171  - reg
172
173additionalProperties: false
174
175allOf:
176  - $ref: ieee80211.yaml#
177  - if:
178      properties:
179        compatible:
180          contains:
181            enum:
182              - qcom,ipq4019-wifi
183    then:
184      properties:
185        interrupts:
186          minItems: 17
187          maxItems: 17
188
189        interrupt-names:
190          items:
191            - const: msi0
192            - const: msi1
193            - const: msi2
194            - const: msi3
195            - const: msi4
196            - const: msi5
197            - const: msi6
198            - const: msi7
199            - const: msi8
200            - const: msi9
201            - const: msi10
202            - const: msi11
203            - const: msi12
204            - const: msi13
205            - const: msi14
206            - const: msi15
207            - const: legacy
208
209        clocks:
210          items:
211            - description: Wi-Fi command clock
212            - description: Wi-Fi reference clock
213            - description: Wi-Fi RTC clock
214
215        clock-names:
216          items:
217            - const: wifi_wcss_cmd
218            - const: wifi_wcss_ref
219            - const: wifi_wcss_rtc
220
221      required:
222        - clocks
223        - clock-names
224        - interrupts
225        - interrupt-names
226        - resets
227        - reset-names
228
229  - if:
230      properties:
231        compatible:
232          contains:
233            enum:
234              - qcom,wcn3990-wifi
235
236    then:
237      properties:
238        clocks:
239          minItems: 1
240          items:
241            - description: XO reference clock
242            - description: Qualcomm Debug Subsystem clock
243
244        clock-names:
245          minItems: 1
246          items:
247            - const: cxo_ref_clk_pin
248            - const: qdss
249
250        interrupts:
251          items:
252            - description: CE0
253            - description: CE1
254            - description: CE2
255            - description: CE3
256            - description: CE4
257            - description: CE5
258            - description: CE6
259            - description: CE7
260            - description: CE8
261            - description: CE9
262            - description: CE10
263            - description: CE11
264
265        interrupt-names: false
266
267      required:
268        - interrupts
269
270examples:
271  # SNoC
272  - |
273    #include <dt-bindings/clock/qcom,rpmcc.h>
274    #include <dt-bindings/interrupt-controller/arm-gic.h>
275
276    wifi@18800000 {
277      compatible = "qcom,wcn3990-wifi";
278      reg = <0x18800000 0x800000>;
279      reg-names = "membase";
280      memory-region = <&wlan_msa_mem>;
281      clocks = <&rpmcc RPM_SMD_RF_CLK2_PIN>;
282      clock-names = "cxo_ref_clk_pin";
283      interrupts = <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
284                   <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
285                   <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
286                   <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
287                   <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
288                   <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
289                   <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
290                   <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
291                   <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
292                   <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
293                   <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
294                   <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
295      iommus = <&anoc2_smmu 0x1900>,
296               <&anoc2_smmu 0x1901>;
297      qcom,snoc-host-cap-8bit-quirk;
298      vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
299      vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
300      vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
301      vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
302      vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
303
304      wifi-firmware {
305        iommus = <&apps_smmu 0x1c02 0x1>;
306      };
307    };
308
309  # AHB
310  - |
311    #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
312
313    wifi@a000000 {
314        compatible = "qcom,ipq4019-wifi";
315        reg = <0xa000000 0x200000>;
316        resets = <&gcc WIFI0_CPU_INIT_RESET>,
317                 <&gcc WIFI0_RADIO_SRIF_RESET>,
318                 <&gcc WIFI0_RADIO_WARM_RESET>,
319                 <&gcc WIFI0_RADIO_COLD_RESET>,
320                 <&gcc WIFI0_CORE_WARM_RESET>,
321                 <&gcc WIFI0_CORE_COLD_RESET>;
322        reset-names = "wifi_cpu_init",
323                      "wifi_radio_srif",
324                      "wifi_radio_warm",
325                      "wifi_radio_cold",
326                      "wifi_core_warm",
327                      "wifi_core_cold";
328        clocks = <&gcc GCC_WCSS2G_CLK>,
329                 <&gcc GCC_WCSS2G_REF_CLK>,
330                 <&gcc GCC_WCSS2G_RTC_CLK>;
331        clock-names = "wifi_wcss_cmd",
332                      "wifi_wcss_ref",
333                      "wifi_wcss_rtc";
334        interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
335                     <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>,
336                     <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>,
337                     <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
338                     <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
339                     <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>,
340                     <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>,
341                     <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
342                     <GIC_SPI 40 IRQ_TYPE_EDGE_RISING>,
343                     <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>,
344                     <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>,
345                     <GIC_SPI 43 IRQ_TYPE_EDGE_RISING>,
346                     <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
347                     <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>,
348                     <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>,
349                     <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>,
350                     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
351        interrupt-names =  "msi0",
352                           "msi1",
353                           "msi2",
354                           "msi3",
355                           "msi4",
356                           "msi5",
357                           "msi6",
358                           "msi7",
359                           "msi8",
360                           "msi9",
361                           "msi10",
362                           "msi11",
363                           "msi12",
364                           "msi13",
365                           "msi14",
366                           "msi15",
367                           "legacy";
368        ieee80211-freq-limit = <5470000 5875000>;
369      };
370