1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/net/wireless/mediatek,mt76.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: MediaTek mt76 wireless devices 9 10maintainers: 11 - Felix Fietkau <nbd@nbd.name> 12 - Lorenzo Bianconi <lorenzo@kernel.org> 13 - Ryder Lee <ryder.lee@mediatek.com> 14 15description: | 16 This node provides properties for configuring the MediaTek mt76xx 17 wireless device. The node is expected to be specified as a child 18 node of the PCI controller to which the wireless chip is connected. 19 Alternatively, it can specify the wireless part of the MT7628/MT7688 20 or MT7622/MT7986 SoC. 21 22properties: 23 compatible: 24 enum: 25 - mediatek,mt76 26 - mediatek,mt7628-wmac 27 - mediatek,mt7622-wmac 28 - mediatek,mt7981-wmac 29 - mediatek,mt7986-wmac 30 31 reg: 32 minItems: 1 33 maxItems: 3 34 description: 35 MT7986 should contain 3 regions consys, dcm, and sku, in this order. 36 37 interrupts: 38 minItems: 1 39 items: 40 - description: major interrupt for rings 41 - description: additional interrupt for ring 19 42 - description: additional interrupt for ring 4 43 - description: additional interrupt for ring 5 44 45 power-domains: 46 maxItems: 1 47 48 memory-region: 49 maxItems: 1 50 51 resets: 52 maxItems: 1 53 description: 54 Specify the consys reset for mt7986. 55 56 reset-names: 57 const: consys 58 59 clocks: 60 maxItems: 2 61 description: 62 Specify the consys clocks for mt7986. 63 64 clock-names: 65 items: 66 - const: mcu 67 - const: ap2conn 68 69 mediatek,infracfg: 70 $ref: /schemas/types.yaml#/definitions/phandle 71 description: 72 Phandle to the infrastructure bus fabric syscon node. 73 This property is MT7622 specific 74 75 ieee80211-freq-limit: true 76 77 nvmem-cells: 78 items: 79 - description: NVMEM cell with EEPROM 80 81 nvmem-cell-names: 82 items: 83 - const: eeprom 84 85 mediatek,eeprom-data: 86 $ref: /schemas/types.yaml#/definitions/uint32-array 87 description: 88 EEPROM data embedded as array. 89 90 mediatek,mtd-eeprom: 91 $ref: /schemas/types.yaml#/definitions/phandle-array 92 items: 93 - items: 94 - description: phandle to MTD partition 95 - description: offset containing EEPROM data 96 description: 97 Phandle to a MTD partition + offset containing EEPROM data 98 deprecated: true 99 100 big-endian: 101 $ref: /schemas/types.yaml#/definitions/flag 102 description: 103 Specify if the radio eeprom partition is written in big-endian 104 105 mediatek,eeprom-merge-otp: 106 type: boolean 107 description: 108 Merge EEPROM data with OTP data. Can be used on boards where the flash 109 calibration data is generic and specific calibration data should be 110 pulled from the OTP ROM 111 112 mediatek,disable-radar-background: 113 type: boolean 114 description: 115 Disable/enable radar/CAC detection running on a dedicated offchannel 116 chain available on some hw. 117 Background radar/CAC detection allows to avoid the CAC downtime 118 switching on a different channel during CAC detection on the selected 119 radar channel. 120 121 led: 122 type: object 123 $ref: /schemas/leds/common.yaml# 124 additionalProperties: false 125 properties: 126 led-active-low: 127 description: 128 LED is enabled with ground signal. 129 type: boolean 130 131 led-sources: 132 maxItems: 1 133 134 power-limits: 135 type: object 136 additionalProperties: false 137 patternProperties: 138 "^r[0-9]+": 139 type: object 140 additionalProperties: false 141 properties: 142 regdomain: 143 $ref: /schemas/types.yaml#/definitions/string 144 description: 145 Regdomain refers to a legal regulatory region. Different 146 countries define different levels of allowable transmitter 147 power, time that a channel can be occupied, and different 148 available channels 149 enum: 150 - FCC 151 - ETSI 152 - JP 153 154 country: 155 $ref: /schemas/types.yaml#/definitions/string 156 pattern: '^[A-Z]{2}$' 157 description: 158 ISO 3166-1 alpha-2 country code for power limits 159 160 patternProperties: 161 "^txpower-[256]g$": 162 type: object 163 additionalProperties: false 164 patternProperties: 165 "^b[0-9]+$": 166 type: object 167 additionalProperties: false 168 properties: 169 channels: 170 $ref: /schemas/types.yaml#/definitions/uint32-array 171 minItems: 2 172 maxItems: 2 173 description: 174 Pairs of first and last channel number of the selected 175 band 176 177 rates-cck: 178 $ref: /schemas/types.yaml#/definitions/uint8-array 179 minItems: 4 180 maxItems: 4 181 description: 182 4 half-dBm per-rate power limit values 183 184 rates-ofdm: 185 $ref: /schemas/types.yaml#/definitions/uint8-array 186 minItems: 8 187 maxItems: 8 188 description: 189 8 half-dBm per-rate power limit values 190 191 rates-mcs: 192 $ref: /schemas/types.yaml#/definitions/uint8-matrix 193 description: 194 Sets of per-rate power limit values for 802.11n/802.11ac 195 rates for multiple channel bandwidth settings. 196 Each set starts with the number of channel bandwidth 197 settings for which the rate set applies, followed by 198 either 8 or 10 power limit values. The order of the 199 channel bandwidth settings is 20, 40, 80 and 160 MHz. 200 maxItems: 4 201 items: 202 minItems: 9 203 maxItems: 11 204 205 rates-ru: 206 $ref: /schemas/types.yaml#/definitions/uint8-matrix 207 description: 208 Sets of per-rate power limit values for 802.11ax rates 209 for multiple channel bandwidth or resource unit settings. 210 Each set starts with the number of channel bandwidth or 211 resource unit settings for which the rate set applies, 212 followed by 12 power limit values. The order of the 213 channel resource unit settings is RU26, RU52, RU106, 214 RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160. 215 items: 216 minItems: 13 217 maxItems: 13 218 219 paths-cck: 220 $ref: /schemas/types.yaml#/definitions/uint8-array 221 minItems: 4 222 maxItems: 4 223 description: 224 4 half-dBm backoff values (1 - 4 antennas, single spacial 225 stream) 226 227 paths-ofdm: 228 $ref: /schemas/types.yaml#/definitions/uint8-array 229 minItems: 4 230 maxItems: 4 231 description: 232 4 half-dBm backoff values (1 - 4 antennas, single spacial 233 stream) 234 235 paths-ofdm-bf: 236 $ref: /schemas/types.yaml#/definitions/uint8-array 237 minItems: 4 238 maxItems: 4 239 description: 240 4 half-dBm backoff values for beamforming 241 (1 - 4 antennas, single spacial stream) 242 243 paths-ru: 244 $ref: /schemas/types.yaml#/definitions/uint8-matrix 245 description: 246 Sets of half-dBm backoff values for 802.11ax rates for 247 1T1ss (aka 1 transmitting antenna with 1 spacial stream), 248 2T1ss, 3T1ss, 4T1ss, 2T2ss, 3T2ss, 4T2ss, 3T3ss, 4T3ss 249 and 4T4ss. 250 Each set starts with the number of channel bandwidth or 251 resource unit settings for which the rate set applies, 252 followed by 10 power limit values. The order of the 253 channel resource unit settings is RU26, RU52, RU106, 254 RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160. 255 minItems: 1 256 maxItems: 7 257 items: 258 minItems: 11 259 maxItems: 11 260 261 paths-ru-bf: 262 $ref: /schemas/types.yaml#/definitions/uint8-matrix 263 description: 264 Sets of half-dBm backoff (beamforming) values for 802.11ax 265 rates for 1T1ss (aka 1 transmitting antenna with 1 spacial 266 stream), 2T1ss, 3T1ss, 4T1ss, 2T2ss, 3T2ss, 4T2ss, 3T3ss, 267 4T3ss and 4T4ss. 268 Each set starts with the number of channel bandwidth or 269 resource unit settings for which the rate set applies, 270 followed by 10 power limit values. The order of the 271 channel resource unit settings is RU26, RU52, RU106, 272 RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160. 273 minItems: 1 274 maxItems: 7 275 items: 276 minItems: 11 277 maxItems: 11 278 279 txs-delta: 280 $ref: /schemas/types.yaml#/definitions/uint32-array 281 description: 282 Half-dBm power delta for different numbers of antennas 283 284required: 285 - compatible 286 - reg 287 288allOf: 289 - $ref: ieee80211.yaml# 290 - if: 291 properties: 292 compatible: 293 contains: 294 enum: 295 - mediatek,mt7981-wmac 296 - mediatek,mt7986-wmac 297 then: 298 properties: 299 interrupts: 300 minItems: 4 301 else: 302 properties: 303 interrupts: 304 maxItems: 1 305 306unevaluatedProperties: false 307 308examples: 309 - | 310 pcie0 { 311 #address-cells = <3>; 312 #size-cells = <2>; 313 wifi@0,0 { 314 compatible = "mediatek,mt76"; 315 reg = <0x0000 0 0 0 0>; 316 ieee80211-freq-limit = <5000000 6000000>; 317 mediatek,mtd-eeprom = <&factory 0x8000>; 318 big-endian; 319 320 led { 321 led-sources = <2>; 322 }; 323 324 power-limits { 325 r0 { 326 regdomain = "FCC"; 327 txpower-5g { 328 b0 { 329 channels = <36 48>; 330 rates-ofdm = /bits/ 8 <23 23 23 23 23 23 23 23>; 331 rates-mcs = /bits/ 8 <1 23 23 23 23 23 23 23 23 23 23>, 332 /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22>; 333 rates-ru = /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22 22 22>, 334 /bits/ 8 <4 20 20 20 20 20 20 20 20 20 20 20 20>; 335 }; 336 b1 { 337 channels = <100 181>; 338 rates-ofdm = /bits/ 8 <14 14 14 14 14 14 14 14>; 339 rates-mcs = /bits/ 8 <4 14 14 14 14 14 14 14 14 14 14>; 340 txs-delta = <12 9 6>; 341 rates-ru = /bits/ 8 <7 14 14 14 14 14 14 14 14 14 14 14 14>; 342 }; 343 }; 344 }; 345 }; 346 }; 347 }; 348 349 - | 350 wifi@10300000 { 351 compatible = "mediatek,mt7628-wmac"; 352 reg = <0x10300000 0x100000>; 353 354 interrupt-parent = <&cpuintc>; 355 interrupts = <6>; 356 357 nvmem-cells = <&eeprom>; 358 nvmem-cell-names = "eeprom"; 359 }; 360 361 - | 362 #include <dt-bindings/interrupt-controller/arm-gic.h> 363 #include <dt-bindings/interrupt-controller/irq.h> 364 wifi@18000000 { 365 compatible = "mediatek,mt7622-wmac"; 366 reg = <0x10300000 0x100000>; 367 interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>; 368 369 mediatek,infracfg = <&infracfg>; 370 371 power-domains = <&scpsys 3>; 372 }; 373 374 - | 375 wifi@18000000 { 376 compatible = "mediatek,mt7986-wmac"; 377 resets = <&watchdog 23>; 378 reset-names = "consys"; 379 reg = <0x18000000 0x1000000>, 380 <0x10003000 0x1000>, 381 <0x11d10000 0x1000>; 382 interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 383 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 384 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>, 385 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; 386 clocks = <&topckgen 50>, 387 <&topckgen 62>; 388 clock-names = "mcu", "ap2conn"; 389 memory-region = <&wmcpu_emi>; 390 }; 391