xref: /linux/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml (revision ae22a94997b8a03dcb3c922857c203246711f9d4) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/net/wireless/mediatek,mt76.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: MediaTek mt76 wireless devices
9
10maintainers:
11  - Felix Fietkau <nbd@nbd.name>
12  - Lorenzo Bianconi <lorenzo@kernel.org>
13  - Ryder Lee <ryder.lee@mediatek.com>
14
15description: |
16  This node provides properties for configuring the MediaTek mt76xx
17  wireless device. The node is expected to be specified as a child
18  node of the PCI controller to which the wireless chip is connected.
19  Alternatively, it can specify the wireless part of the MT7628/MT7688
20  or MT7622/MT7986 SoC.
21
22properties:
23  compatible:
24    enum:
25      - mediatek,mt76
26      - mediatek,mt7628-wmac
27      - mediatek,mt7622-wmac
28      - mediatek,mt7981-wmac
29      - mediatek,mt7986-wmac
30
31  reg:
32    minItems: 1
33    maxItems: 3
34    description:
35      MT7986 should contain 3 regions consys, dcm, and sku, in this order.
36
37  interrupts:
38    minItems: 1
39    items:
40      - description: major interrupt for rings
41      - description: additional interrupt for ring 19
42      - description: additional interrupt for ring 4
43      - description: additional interrupt for ring 5
44
45  power-domains:
46    maxItems: 1
47
48  memory-region:
49    maxItems: 1
50
51  resets:
52    maxItems: 1
53    description:
54      Specify the consys reset for mt7986.
55
56  reset-names:
57    const: consys
58
59  clocks:
60    maxItems: 2
61    description:
62      Specify the consys clocks for mt7986.
63
64  clock-names:
65    items:
66      - const: mcu
67      - const: ap2conn
68
69  mediatek,infracfg:
70    $ref: /schemas/types.yaml#/definitions/phandle
71    description:
72      Phandle to the infrastructure bus fabric syscon node.
73      This property is MT7622 specific
74
75  ieee80211-freq-limit: true
76
77  nvmem-cells:
78    items:
79      - description: NVMEM cell with EEPROM
80
81  nvmem-cell-names:
82    items:
83      - const: eeprom
84
85  mediatek,eeprom-data:
86    $ref: /schemas/types.yaml#/definitions/uint32-array
87    description:
88      EEPROM data embedded as array.
89
90  mediatek,mtd-eeprom:
91    $ref: /schemas/types.yaml#/definitions/phandle-array
92    items:
93      - items:
94          - description: phandle to MTD partition
95          - description: offset containing EEPROM data
96    description:
97      Phandle to a MTD partition + offset containing EEPROM data
98    deprecated: true
99
100  big-endian:
101    $ref: /schemas/types.yaml#/definitions/flag
102    description:
103      Specify if the radio eeprom partition is written in big-endian
104
105  mediatek,eeprom-merge-otp:
106    type: boolean
107    description:
108      Merge EEPROM data with OTP data. Can be used on boards where the flash
109      calibration data is generic and specific calibration data should be
110      pulled from the OTP ROM
111
112  mediatek,disable-radar-background:
113    type: boolean
114    description:
115      Disable/enable radar/CAC detection running on a dedicated offchannel
116      chain available on some hw.
117      Background radar/CAC detection allows to avoid the CAC downtime
118      switching on a different channel during CAC detection on the selected
119      radar channel.
120
121  led:
122    type: object
123    $ref: /schemas/leds/common.yaml#
124    additionalProperties: false
125    properties:
126      led-active-low:
127        description:
128          LED is enabled with ground signal.
129        type: boolean
130
131      led-sources:
132        maxItems: 1
133
134  power-limits:
135    type: object
136    additionalProperties: false
137    patternProperties:
138      "^r[0-9]+":
139        type: object
140        additionalProperties: false
141        properties:
142          regdomain:
143            $ref: /schemas/types.yaml#/definitions/string
144            description:
145              Regdomain refers to a legal regulatory region. Different
146              countries define different levels of allowable transmitter
147              power, time that a channel can be occupied, and different
148              available channels
149            enum:
150              - FCC
151              - ETSI
152              - JP
153
154        patternProperties:
155          "^txpower-[256]g$":
156            type: object
157            additionalProperties: false
158            patternProperties:
159              "^b[0-9]+$":
160                type: object
161                additionalProperties: false
162                properties:
163                  channels:
164                    $ref: /schemas/types.yaml#/definitions/uint32-array
165                    minItems: 2
166                    maxItems: 2
167                    description:
168                      Pairs of first and last channel number of the selected
169                      band
170
171                  rates-cck:
172                    $ref: /schemas/types.yaml#/definitions/uint8-array
173                    minItems: 4
174                    maxItems: 4
175                    description:
176                      4 half-dBm per-rate power limit values
177
178                  rates-ofdm:
179                    $ref: /schemas/types.yaml#/definitions/uint8-array
180                    minItems: 8
181                    maxItems: 8
182                    description:
183                      8 half-dBm per-rate power limit values
184
185                  rates-mcs:
186                    $ref: /schemas/types.yaml#/definitions/uint8-matrix
187                    description:
188                      Sets of per-rate power limit values for 802.11n/802.11ac
189                      rates for multiple channel bandwidth settings.
190                      Each set starts with the number of channel bandwidth
191                      settings for which the rate set applies, followed by
192                      either 8 or 10 power limit values. The order of the
193                      channel bandwidth settings is 20, 40, 80 and 160 MHz.
194                    maxItems: 4
195                    items:
196                      minItems: 9
197                      maxItems: 11
198
199                  rates-ru:
200                    $ref: /schemas/types.yaml#/definitions/uint8-matrix
201                    description:
202                      Sets of per-rate power limit values for 802.11ax rates
203                      for multiple channel bandwidth or resource unit settings.
204                      Each set starts with the number of channel bandwidth or
205                      resource unit settings for which the rate set applies,
206                      followed by 12 power limit values. The order of the
207                      channel resource unit settings is RU26, RU52, RU106,
208                      RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160.
209                    items:
210                      minItems: 13
211                      maxItems: 13
212
213                  txs-delta:
214                    $ref: /schemas/types.yaml#/definitions/uint32-array
215                    description:
216                      Half-dBm power delta for different numbers of antennas
217
218required:
219  - compatible
220  - reg
221
222allOf:
223  - $ref: ieee80211.yaml#
224  - if:
225      properties:
226        compatible:
227          contains:
228            enum:
229              - mediatek,mt7981-wmac
230              - mediatek,mt7986-wmac
231    then:
232      properties:
233        interrupts:
234          minItems: 4
235    else:
236      properties:
237        interrupts:
238          maxItems: 1
239
240unevaluatedProperties: false
241
242examples:
243  - |
244    pcie0 {
245      #address-cells = <3>;
246      #size-cells = <2>;
247      wifi@0,0 {
248        compatible = "mediatek,mt76";
249        reg = <0x0000 0 0 0 0>;
250        ieee80211-freq-limit = <5000000 6000000>;
251        mediatek,mtd-eeprom = <&factory 0x8000>;
252        big-endian;
253
254        led {
255          led-sources = <2>;
256        };
257
258        power-limits {
259          r0 {
260            regdomain = "FCC";
261            txpower-5g {
262               b0 {
263                   channels = <36 48>;
264                   rates-ofdm = /bits/ 8 <23 23 23 23 23 23 23 23>;
265                   rates-mcs = /bits/ 8 <1 23 23 23 23 23 23 23 23 23 23>,
266                               /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22>;
267                   rates-ru = /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22 22 22>,
268                              /bits/ 8 <4 20 20 20 20 20 20 20 20 20 20 20 20>;
269               };
270               b1 {
271                   channels = <100 181>;
272                   rates-ofdm = /bits/ 8 <14 14 14 14 14 14 14 14>;
273                   rates-mcs = /bits/ 8  <4 14 14 14 14 14 14 14 14 14 14>;
274                   txs-delta = <12 9 6>;
275                   rates-ru = /bits/ 8  <7 14 14 14 14 14 14 14 14 14 14 14 14>;
276               };
277             };
278          };
279        };
280      };
281    };
282
283  - |
284    wifi@10300000 {
285      compatible = "mediatek,mt7628-wmac";
286      reg = <0x10300000 0x100000>;
287
288      interrupt-parent = <&cpuintc>;
289      interrupts = <6>;
290
291      nvmem-cells = <&eeprom>;
292      nvmem-cell-names = "eeprom";
293    };
294
295  - |
296    #include <dt-bindings/interrupt-controller/arm-gic.h>
297    #include <dt-bindings/interrupt-controller/irq.h>
298    wifi@18000000 {
299      compatible = "mediatek,mt7622-wmac";
300      reg = <0x10300000 0x100000>;
301      interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>;
302
303      mediatek,infracfg = <&infracfg>;
304
305      power-domains = <&scpsys 3>;
306    };
307
308  - |
309    wifi@18000000 {
310        compatible = "mediatek,mt7986-wmac";
311        resets = <&watchdog 23>;
312        reset-names = "consys";
313        reg = <0x18000000 0x1000000>,
314              <0x10003000 0x1000>,
315              <0x11d10000 0x1000>;
316        interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
317                     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
318                     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
319                     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
320        clocks = <&topckgen 50>,
321                 <&topckgen 62>;
322        clock-names = "mcu", "ap2conn";
323        memory-region = <&wmcpu_emi>;
324    };
325