xref: /linux/Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml (revision 79d2e1919a2728ef49d938eb20ebd5903c14dfb0)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/thead,th1520-gmac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: T-HEAD TH1520 GMAC Ethernet controller
8
9maintainers:
10  - Drew Fustini <dfustini@tenstorrent.com>
11
12description: |
13  The TH1520 GMAC is described in the TH1520 Peripheral Interface User Manual
14  https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
15
16  Features include
17    - Compliant with IEEE802.3 Specification
18    - IEEE 1588-2008 standard for precision networked clock synchronization
19    - Supports 10/100/1000Mbps data transfer rate
20    - Supports RGMII/MII interface
21    - Preamble and start of frame data (SFD) insertion in Transmit path
22    - Preamble and SFD deletion in the Receive path
23    - Automatic CRC and pad generation options for receive frames
24    - MDIO master interface for PHY device configuration and management
25
26  The GMAC Registers consists of two parts
27    - APB registers are used to configure clock frequency/clock enable/clock
28      direction/PHY interface type.
29    - AHB registers are use to configure GMAC core (DesignWare Core part).
30      GMAC core register consists of DMA registers and GMAC registers.
31
32select:
33  properties:
34    compatible:
35      contains:
36        enum:
37          - thead,th1520-gmac
38  required:
39    - compatible
40
41allOf:
42  - $ref: snps,dwmac.yaml#
43
44properties:
45  compatible:
46    items:
47      - enum:
48          - thead,th1520-gmac
49      - const: snps,dwmac-3.70a
50
51  reg:
52    items:
53      - description: DesignWare GMAC IP core registers
54      - description: GMAC APB registers
55
56  reg-names:
57    items:
58      - const: dwmac
59      - const: apb
60
61  clocks:
62    items:
63      - description: GMAC main clock
64      - description: Peripheral registers interface clock
65
66  clock-names:
67    items:
68      - const: stmmaceth
69      - const: pclk
70
71  interrupts:
72    items:
73      - description: Combined signal for various interrupt events
74
75  interrupt-names:
76    items:
77      - const: macirq
78
79required:
80  - clocks
81  - clock-names
82
83unevaluatedProperties: false
84
85examples:
86  - |
87    gmac0: ethernet@e7070000 {
88        compatible = "thead,th1520-gmac", "snps,dwmac-3.70a";
89        reg = <0xe7070000 0x2000>, <0xec003000 0x1000>;
90        reg-names = "dwmac", "apb";
91        clocks = <&clk 1>, <&clk 2>;
92        clock-names = "stmmaceth", "pclk";
93        interrupts = <66>;
94        interrupt-names = "macirq";
95        phy-mode = "rgmii-id";
96        snps,fixed-burst;
97        snps,axi-config = <&stmmac_axi_setup>;
98        snps,pbl = <32>;
99        phy-handle = <&phy0>;
100
101        mdio {
102            #address-cells = <1>;
103            #size-cells = <0>;
104            compatible = "snps,dwmac-mdio";
105
106            phy0: ethernet-phy@0 {
107                reg = <0>;
108            };
109        };
110    };
111