1*1f6c3899SSwathi K S# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*1f6c3899SSwathi K S%YAML 1.2 3*1f6c3899SSwathi K S--- 4*1f6c3899SSwathi K S$id: http://devicetree.org/schemas/net/tesla,fsd-ethqos.yaml# 5*1f6c3899SSwathi K S$schema: http://devicetree.org/meta-schemas/core.yaml# 6*1f6c3899SSwathi K S 7*1f6c3899SSwathi K Stitle: FSD Ethernet Quality of Service 8*1f6c3899SSwathi K S 9*1f6c3899SSwathi K Smaintainers: 10*1f6c3899SSwathi K S - Swathi K S <swathi.ks@samsung.com> 11*1f6c3899SSwathi K S 12*1f6c3899SSwathi K Sdescription: 13*1f6c3899SSwathi K S Tesla ethernet devices based on dwmmac support Gigabit ethernet. 14*1f6c3899SSwathi K S 15*1f6c3899SSwathi K SallOf: 16*1f6c3899SSwathi K S - $ref: snps,dwmac.yaml# 17*1f6c3899SSwathi K S 18*1f6c3899SSwathi K Sproperties: 19*1f6c3899SSwathi K S compatible: 20*1f6c3899SSwathi K S const: tesla,fsd-ethqos 21*1f6c3899SSwathi K S 22*1f6c3899SSwathi K S reg: 23*1f6c3899SSwathi K S maxItems: 1 24*1f6c3899SSwathi K S 25*1f6c3899SSwathi K S interrupts: 26*1f6c3899SSwathi K S maxItems: 1 27*1f6c3899SSwathi K S 28*1f6c3899SSwathi K S interrupt-names: 29*1f6c3899SSwathi K S items: 30*1f6c3899SSwathi K S - const: macirq 31*1f6c3899SSwathi K S 32*1f6c3899SSwathi K S clocks: 33*1f6c3899SSwathi K S minItems: 5 34*1f6c3899SSwathi K S items: 35*1f6c3899SSwathi K S - description: PTP clock 36*1f6c3899SSwathi K S - description: Master bus clock 37*1f6c3899SSwathi K S - description: Slave bus clock 38*1f6c3899SSwathi K S - description: MAC TX clock 39*1f6c3899SSwathi K S - description: MAC RX clock 40*1f6c3899SSwathi K S - description: Master2 bus clock 41*1f6c3899SSwathi K S - description: Slave2 bus clock 42*1f6c3899SSwathi K S - description: RX MUX clock 43*1f6c3899SSwathi K S - description: PHY RX clock 44*1f6c3899SSwathi K S - description: PERIC RGMII clock 45*1f6c3899SSwathi K S 46*1f6c3899SSwathi K S clock-names: 47*1f6c3899SSwathi K S minItems: 5 48*1f6c3899SSwathi K S items: 49*1f6c3899SSwathi K S - const: ptp_ref 50*1f6c3899SSwathi K S - const: master_bus 51*1f6c3899SSwathi K S - const: slave_bus 52*1f6c3899SSwathi K S - const: tx 53*1f6c3899SSwathi K S - const: rx 54*1f6c3899SSwathi K S - const: master2_bus 55*1f6c3899SSwathi K S - const: slave2_bus 56*1f6c3899SSwathi K S - const: eqos_rxclk_mux 57*1f6c3899SSwathi K S - const: eqos_phyrxclk 58*1f6c3899SSwathi K S - const: dout_peric_rgmii_clk 59*1f6c3899SSwathi K S 60*1f6c3899SSwathi K S iommus: 61*1f6c3899SSwathi K S maxItems: 1 62*1f6c3899SSwathi K S 63*1f6c3899SSwathi K S phy-mode: 64*1f6c3899SSwathi K S enum: 65*1f6c3899SSwathi K S - rgmii 66*1f6c3899SSwathi K S - rgmii-id 67*1f6c3899SSwathi K S - rgmii-rxid 68*1f6c3899SSwathi K S - rgmii-txid 69*1f6c3899SSwathi K S 70*1f6c3899SSwathi K Srequired: 71*1f6c3899SSwathi K S - compatible 72*1f6c3899SSwathi K S - reg 73*1f6c3899SSwathi K S - interrupts 74*1f6c3899SSwathi K S - clocks 75*1f6c3899SSwathi K S - clock-names 76*1f6c3899SSwathi K S - iommus 77*1f6c3899SSwathi K S - phy-mode 78*1f6c3899SSwathi K S 79*1f6c3899SSwathi K SunevaluatedProperties: false 80*1f6c3899SSwathi K S 81*1f6c3899SSwathi K Sexamples: 82*1f6c3899SSwathi K S - | 83*1f6c3899SSwathi K S #include <dt-bindings/clock/fsd-clk.h> 84*1f6c3899SSwathi K S #include <dt-bindings/interrupt-controller/arm-gic.h> 85*1f6c3899SSwathi K S soc { 86*1f6c3899SSwathi K S #address-cells = <2>; 87*1f6c3899SSwathi K S #size-cells = <2>; 88*1f6c3899SSwathi K S ethernet1: ethernet@14300000 { 89*1f6c3899SSwathi K S compatible = "tesla,fsd-ethqos"; 90*1f6c3899SSwathi K S reg = <0x0 0x14300000 0x0 0x10000>; 91*1f6c3899SSwathi K S interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 92*1f6c3899SSwathi K S interrupt-names = "macirq"; 93*1f6c3899SSwathi K S clocks = <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_PTP_REF_I>, 94*1f6c3899SSwathi K S <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_ACLK_I>, 95*1f6c3899SSwathi K S <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_HCLK_I>, 96*1f6c3899SSwathi K S <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_RGMII_CLK_I>, 97*1f6c3899SSwathi K S <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_RX_I>, 98*1f6c3899SSwathi K S <&clock_peric PERIC_BUS_D_PERIC_IPCLKPORT_EQOSCLK>, 99*1f6c3899SSwathi K S <&clock_peric PERIC_BUS_P_PERIC_IPCLKPORT_EQOSCLK>, 100*1f6c3899SSwathi K S <&clock_peric PERIC_EQOS_PHYRXCLK_MUX>, 101*1f6c3899SSwathi K S <&clock_peric PERIC_EQOS_PHYRXCLK>, 102*1f6c3899SSwathi K S <&clock_peric PERIC_DOUT_RGMII_CLK>; 103*1f6c3899SSwathi K S clock-names = "ptp_ref", "master_bus", "slave_bus","tx", 104*1f6c3899SSwathi K S "rx", "master2_bus", "slave2_bus", "eqos_rxclk_mux", 105*1f6c3899SSwathi K S "eqos_phyrxclk","dout_peric_rgmii_clk"; 106*1f6c3899SSwathi K S assigned-clocks = <&clock_peric PERIC_EQOS_PHYRXCLK_MUX>, 107*1f6c3899SSwathi K S <&clock_peric PERIC_EQOS_PHYRXCLK>; 108*1f6c3899SSwathi K S assigned-clock-parents = <&clock_peric PERIC_EQOS_PHYRXCLK>; 109*1f6c3899SSwathi K S pinctrl-names = "default"; 110*1f6c3899SSwathi K S pinctrl-0 = <ð1_tx_clk>, <ð1_tx_data>, <ð1_tx_ctrl>, 111*1f6c3899SSwathi K S <ð1_phy_intr>, <ð1_rx_clk>, <ð1_rx_data>, 112*1f6c3899SSwathi K S <ð1_rx_ctrl>, <ð1_mdio>; 113*1f6c3899SSwathi K S iommus = <&smmu_peric 0x0 0x1>; 114*1f6c3899SSwathi K S phy-mode = "rgmii-id"; 115*1f6c3899SSwathi K S }; 116*1f6c3899SSwathi K S }; 117*1f6c3899SSwathi K S 118*1f6c3899SSwathi K S... 119