xref: /linux/Documentation/devicetree/bindings/net/stm32-dwmac.yaml (revision 26fbb4c8c7c3ee9a4c3b4de555a8587b5a19154e) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright 2019 BayLibre, SAS
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/net/stm32-dwmac.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: STMicroelectronics STM32 / MCU DWMAC glue layer controller
9
10maintainers:
11  - Alexandre Torgue <alexandre.torgue@st.com>
12  - Christophe Roullier <christophe.roullier@st.com>
13
14description:
15  This file documents platform glue layer for stmmac.
16
17# We need a select here so we don't match all nodes with 'snps,dwmac'
18select:
19  properties:
20    compatible:
21      contains:
22        enum:
23          - st,stm32-dwmac
24          - st,stm32mp1-dwmac
25  required:
26    - compatible
27
28allOf:
29  - $ref: "snps,dwmac.yaml#"
30
31properties:
32  compatible:
33    oneOf:
34      - items:
35          - enum:
36              - st,stm32mp1-dwmac
37          - const: snps,dwmac-4.20a
38      - items:
39          - enum:
40              - st,stm32-dwmac
41          - const: snps,dwmac-4.10a
42      - items:
43          - enum:
44              - st,stm32-dwmac
45          - const: snps,dwmac-3.50a
46
47  clocks:
48    minItems: 3
49    maxItems: 5
50    items:
51      - description: GMAC main clock
52      - description: MAC TX clock
53      - description: MAC RX clock
54      - description: For MPU family, used for power mode
55      - description: For MPU family, used for PHY without quartz
56
57  clock-names:
58    minItems: 3
59    maxItems: 5
60    contains:
61      enum:
62        - stmmaceth
63        - mac-clk-tx
64        - mac-clk-rx
65        - ethstp
66        - eth-ck
67
68  st,syscon:
69    $ref: "/schemas/types.yaml#/definitions/phandle-array"
70    description:
71      Should be phandle/offset pair. The phandle to the syscon node which
72      encompases the glue register, and the offset of the control register
73
74  st,eth-clk-sel:
75    description:
76      set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125.
77    type: boolean
78
79  st,eth-ref-clk-sel:
80    description:
81      set this property in RMII mode when you have PHY without crystal 50MHz and want to
82      select RCC clock instead of ETH_REF_CLK.
83    type: boolean
84
85required:
86  - compatible
87  - clocks
88  - clock-names
89  - st,syscon
90
91unevaluatedProperties: false
92
93examples:
94  - |
95    #include <dt-bindings/interrupt-controller/arm-gic.h>
96    #include <dt-bindings/clock/stm32mp1-clks.h>
97    #include <dt-bindings/reset/stm32mp1-resets.h>
98    #include <dt-bindings/mfd/stm32h7-rcc.h>
99    //Example 1
100     ethernet0: ethernet@5800a000 {
101           compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
102           reg = <0x5800a000 0x2000>;
103           reg-names = "stmmaceth";
104           interrupts = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
105           interrupt-names = "macirq";
106           clock-names = "stmmaceth",
107                     "mac-clk-tx",
108                     "mac-clk-rx",
109                     "ethstp",
110                     "eth-ck";
111           clocks = <&rcc ETHMAC>,
112                <&rcc ETHTX>,
113                <&rcc ETHRX>,
114                <&rcc ETHSTP>,
115                <&rcc ETHCK_K>;
116           st,syscon = <&syscfg 0x4>;
117           snps,pbl = <2>;
118           snps,axi-config = <&stmmac_axi_config_0>;
119           snps,tso;
120           phy-mode = "rgmii";
121       };
122
123    //Example 2 (MCU example)
124     ethernet1: ethernet@40028000 {
125           compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
126           reg = <0x40028000 0x8000>;
127           reg-names = "stmmaceth";
128           interrupts = <0 61 0>, <0 62 0>;
129           interrupt-names = "macirq", "eth_wake_irq";
130           clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
131           clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
132           st,syscon = <&syscfg 0x4>;
133           snps,pbl = <8>;
134           snps,mixed-burst;
135           phy-mode = "mii";
136       };
137
138    //Example 3
139     ethernet2: ethernet@40027000 {
140           compatible = "st,stm32-dwmac", "snps,dwmac-4.10a";
141           reg = <0x40028000 0x8000>;
142           reg-names = "stmmaceth";
143           interrupts = <61>;
144           interrupt-names = "macirq";
145           clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
146           clocks = <&rcc 62>, <&rcc 61>, <&rcc 60>;
147           st,syscon = <&syscfg 0x4>;
148           snps,pbl = <8>;
149           phy-mode = "mii";
150       };
151