1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (C) 2022 StarFive Technology Co., Ltd. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: StarFive JH7110 DWMAC glue layer 9 10maintainers: 11 - Emil Renner Berthing <kernel@esmil.dk> 12 - Samin Guo <samin.guo@starfivetech.com> 13 14select: 15 properties: 16 compatible: 17 contains: 18 enum: 19 - starfive,jh7100-dwmac 20 - starfive,jh7110-dwmac 21 required: 22 - compatible 23 24properties: 25 compatible: 26 oneOf: 27 - items: 28 - const: starfive,jh7100-dwmac 29 - const: snps,dwmac 30 - items: 31 - const: starfive,jh7110-dwmac 32 - const: snps,dwmac-5.20 33 34 reg: 35 maxItems: 1 36 37 clocks: 38 items: 39 - description: GMAC main clock 40 - description: GMAC AHB clock 41 - description: PTP clock 42 - description: TX clock 43 - description: GTX clock 44 45 clock-names: 46 items: 47 - const: stmmaceth 48 - const: pclk 49 - const: ptp_ref 50 - const: tx 51 - const: gtx 52 53 starfive,tx-use-rgmii-clk: 54 description: 55 Tx clock is provided by external rgmii clock. 56 type: boolean 57 58 starfive,syscon: 59 $ref: /schemas/types.yaml#/definitions/phandle-array 60 items: 61 - items: 62 - description: phandle to syscon that configures phy mode 63 - description: Offset of phy mode selection 64 - description: Shift of phy mode selection 65 description: 66 A phandle to syscon with two arguments that configure phy mode. 67 The argument one is the offset of phy mode selection, the 68 argument two is the shift of phy mode selection. 69 70required: 71 - compatible 72 - reg 73 - clocks 74 - clock-names 75 - interrupts 76 - interrupt-names 77 - resets 78 - reset-names 79 80allOf: 81 - $ref: snps,dwmac.yaml# 82 83 - if: 84 properties: 85 compatible: 86 contains: 87 const: starfive,jh7100-dwmac 88 then: 89 properties: 90 interrupts: 91 minItems: 2 92 maxItems: 2 93 94 interrupt-names: 95 minItems: 2 96 maxItems: 2 97 98 resets: 99 maxItems: 1 100 101 reset-names: 102 const: ahb 103 104 - if: 105 properties: 106 compatible: 107 contains: 108 const: starfive,jh7110-dwmac 109 then: 110 properties: 111 interrupts: 112 minItems: 3 113 maxItems: 3 114 115 interrupt-names: 116 minItems: 3 117 maxItems: 3 118 119 resets: 120 minItems: 2 121 122 reset-names: 123 minItems: 2 124 125unevaluatedProperties: false 126 127examples: 128 - | 129 ethernet@16030000 { 130 compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20"; 131 reg = <0x16030000 0x10000>; 132 clocks = <&clk 3>, <&clk 2>, <&clk 109>, 133 <&clk 6>, <&clk 111>; 134 clock-names = "stmmaceth", "pclk", "ptp_ref", 135 "tx", "gtx"; 136 resets = <&rst 1>, <&rst 2>; 137 reset-names = "stmmaceth", "ahb"; 138 interrupts = <7>, <6>, <5>; 139 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; 140 phy-mode = "rgmii-id"; 141 snps,multicast-filter-bins = <64>; 142 snps,perfect-filter-entries = <8>; 143 rx-fifo-depth = <2048>; 144 tx-fifo-depth = <2048>; 145 snps,fixed-burst; 146 snps,no-pbl-x8; 147 snps,tso; 148 snps,force_thresh_dma_mode; 149 snps,axi-config = <&stmmac_axi_setup>; 150 snps,en-tx-lpi-clockgating; 151 snps,txpbl = <16>; 152 snps,rxpbl = <16>; 153 starfive,syscon = <&aon_syscon 0xc 0x12>; 154 phy-handle = <&phy0>; 155 156 mdio { 157 #address-cells = <1>; 158 #size-cells = <0>; 159 compatible = "snps,dwmac-mdio"; 160 161 phy0: ethernet-phy@0 { 162 reg = <0>; 163 }; 164 }; 165 166 stmmac_axi_setup: stmmac-axi-config { 167 snps,lpi_en; 168 snps,wr_osr_lmt = <4>; 169 snps,rd_osr_lmt = <4>; 170 snps,blen = <256 128 64 32 0 0 0>; 171 }; 172 }; 173