xref: /linux/Documentation/devicetree/bindings/net/socionext,synquacer-netsec.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/socionext,synquacer-netsec.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Socionext NetSec Ethernet Controller IP
8
9maintainers:
10  - Jassi Brar <jaswinder.singh@linaro.org>
11  - Ilias Apalodimas <ilias.apalodimas@linaro.org>
12
13allOf:
14  - $ref: ethernet-controller.yaml#
15
16properties:
17  compatible:
18    const: socionext,synquacer-netsec
19
20  reg:
21    items:
22      - description: control register area
23      - description: EEPROM holding the MAC address and microengine firmware
24
25  clocks:
26    maxItems: 1
27
28  clock-names:
29    const: phy_ref_clk
30
31  dma-coherent: true
32
33  interrupts:
34    maxItems: 1
35
36  mdio:
37    $ref: mdio.yaml#
38
39required:
40  - compatible
41  - reg
42  - clocks
43  - clock-names
44  - interrupts
45  - mdio
46
47unevaluatedProperties: false
48
49examples:
50  - |
51    #include <dt-bindings/interrupt-controller/arm-gic.h>
52
53    ethernet@522d0000 {
54        compatible = "socionext,synquacer-netsec";
55        reg = <0x522d0000 0x10000>, <0x10000000 0x10000>;
56        interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
57        clocks = <&clk_netsec>;
58        clock-names = "phy_ref_clk";
59        phy-mode = "rgmii";
60        max-speed = <1000>;
61        max-frame-size = <9000>;
62        phy-handle = <&phy1>;
63
64        mdio {
65            #address-cells = <1>;
66            #size-cells = <0>;
67            phy1: ethernet-phy@1 {
68                compatible = "ethernet-phy-ieee802.3-c22";
69                reg = <1>;
70            };
71        };
72    };
73...
74