1*3225de1bSRui Miguel Silva# SPDX-License-Identifier: GPL-2.0 2*3225de1bSRui Miguel Silva%YAML 1.2 3*3225de1bSRui Miguel Silva--- 4*3225de1bSRui Miguel Silva$id: http://devicetree.org/schemas/net/smsc,lan91c111.yaml# 5*3225de1bSRui Miguel Silva$schema: http://devicetree.org/meta-schemas/core.yaml# 6*3225de1bSRui Miguel Silva 7*3225de1bSRui Miguel Silvatitle: Smart Mixed-Signal Connectivity (SMSC) LAN91C9x/91C1xx Controller 8*3225de1bSRui Miguel Silva 9*3225de1bSRui Miguel Silvamaintainers: 10*3225de1bSRui Miguel Silva - Nicolas Pitre <nico@fluxnic.net> 11*3225de1bSRui Miguel Silva 12*3225de1bSRui Miguel SilvaallOf: 13*3225de1bSRui Miguel Silva - $ref: ethernet-controller.yaml# 14*3225de1bSRui Miguel Silva 15*3225de1bSRui Miguel Silvaproperties: 16*3225de1bSRui Miguel Silva compatible: 17*3225de1bSRui Miguel Silva const: smsc,lan91c111 18*3225de1bSRui Miguel Silva 19*3225de1bSRui Miguel Silva reg: 20*3225de1bSRui Miguel Silva maxItems: 1 21*3225de1bSRui Miguel Silva 22*3225de1bSRui Miguel Silva interrupts: 23*3225de1bSRui Miguel Silva maxItems: 1 24*3225de1bSRui Miguel Silva 25*3225de1bSRui Miguel Silva reg-shift: true 26*3225de1bSRui Miguel Silva 27*3225de1bSRui Miguel Silva reg-io-width: 28*3225de1bSRui Miguel Silva enum: [ 1, 2, 4 ] 29*3225de1bSRui Miguel Silva default: 4 30*3225de1bSRui Miguel Silva 31*3225de1bSRui Miguel Silva reset-gpios: 32*3225de1bSRui Miguel Silva description: GPIO connected to control RESET pin 33*3225de1bSRui Miguel Silva maxItems: 1 34*3225de1bSRui Miguel Silva 35*3225de1bSRui Miguel Silva power-gpios: 36*3225de1bSRui Miguel Silva description: GPIO connect to control PWRDWN pin 37*3225de1bSRui Miguel Silva maxItems: 1 38*3225de1bSRui Miguel Silva 39*3225de1bSRui Miguel Silva pxa-u16-align4: 40*3225de1bSRui Miguel Silva description: put in place the workaround the force all u16 writes to be 41*3225de1bSRui Miguel Silva 32 bits aligned 42*3225de1bSRui Miguel Silva type: boolean 43*3225de1bSRui Miguel Silva 44*3225de1bSRui Miguel Silvarequired: 45*3225de1bSRui Miguel Silva - compatible 46*3225de1bSRui Miguel Silva - reg 47*3225de1bSRui Miguel Silva - interrupts 48*3225de1bSRui Miguel Silva 49*3225de1bSRui Miguel SilvaunevaluatedProperties: false 50*3225de1bSRui Miguel Silva 51*3225de1bSRui Miguel Silvaexamples: 52*3225de1bSRui Miguel Silva - | 53*3225de1bSRui Miguel Silva #include <dt-bindings/interrupt-controller/arm-gic.h> 54*3225de1bSRui Miguel Silva 55*3225de1bSRui Miguel Silva ethernet@4010000 { 56*3225de1bSRui Miguel Silva compatible = "smsc,lan91c111"; 57*3225de1bSRui Miguel Silva reg = <0x40100000 0x10000>; 58*3225de1bSRui Miguel Silva phy-mode = "mii"; 59*3225de1bSRui Miguel Silva interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 60*3225de1bSRui Miguel Silva reg-io-width = <2>; 61*3225de1bSRui Miguel Silva }; 62