1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/rockchip-dwmac.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip 10/100/1000 Ethernet driver(GMAC) 8 9maintainers: 10 - David Wu <david.wu@rock-chips.com> 11 12# We need a select here so we don't match all nodes with 'snps,dwmac' 13select: 14 properties: 15 compatible: 16 contains: 17 enum: 18 - rockchip,px30-gmac 19 - rockchip,rk3128-gmac 20 - rockchip,rk3228-gmac 21 - rockchip,rk3288-gmac 22 - rockchip,rk3308-gmac 23 - rockchip,rk3328-gmac 24 - rockchip,rk3366-gmac 25 - rockchip,rk3368-gmac 26 - rockchip,rk3399-gmac 27 - rockchip,rk3568-gmac 28 - rockchip,rk3576-gmac 29 - rockchip,rk3588-gmac 30 - rockchip,rv1108-gmac 31 - rockchip,rv1126-gmac 32 required: 33 - compatible 34 35allOf: 36 - $ref: snps,dwmac.yaml# 37 38properties: 39 compatible: 40 oneOf: 41 - items: 42 - enum: 43 - rockchip,px30-gmac 44 - rockchip,rk3128-gmac 45 - rockchip,rk3228-gmac 46 - rockchip,rk3288-gmac 47 - rockchip,rk3308-gmac 48 - rockchip,rk3328-gmac 49 - rockchip,rk3366-gmac 50 - rockchip,rk3368-gmac 51 - rockchip,rk3399-gmac 52 - rockchip,rv1108-gmac 53 - items: 54 - enum: 55 - rockchip,rk3568-gmac 56 - rockchip,rk3576-gmac 57 - rockchip,rk3588-gmac 58 - rockchip,rv1126-gmac 59 - const: snps,dwmac-4.20a 60 61 clocks: 62 minItems: 5 63 maxItems: 8 64 65 clock-names: 66 contains: 67 enum: 68 - stmmaceth 69 - mac_clk_tx 70 - mac_clk_rx 71 - aclk_mac 72 - pclk_mac 73 - clk_mac_ref 74 - clk_mac_refout 75 - clk_mac_speed 76 77 clock_in_out: 78 description: 79 For RGMII, it must be "input", means main clock(125MHz) 80 is not sourced from SoC's PLL, but input from PHY. 81 For RMII, "input" means PHY provides the reference clock(50MHz), 82 "output" means GMAC provides the reference clock. 83 $ref: /schemas/types.yaml#/definitions/string 84 enum: [input, output] 85 default: input 86 87 rockchip,grf: 88 description: The phandle of the syscon node for the general register file. 89 $ref: /schemas/types.yaml#/definitions/phandle 90 91 rockchip,php-grf: 92 description: 93 The phandle of the syscon node for the peripheral general register file. 94 $ref: /schemas/types.yaml#/definitions/phandle 95 96 tx_delay: 97 description: Delay value for TXD timing. 98 $ref: /schemas/types.yaml#/definitions/uint32 99 minimum: 0 100 maximum: 0x7F 101 default: 0x30 102 103 rx_delay: 104 description: Delay value for RXD timing. 105 $ref: /schemas/types.yaml#/definitions/uint32 106 minimum: 0 107 maximum: 0x7F 108 default: 0x10 109 110 phy-supply: 111 description: PHY regulator 112 113required: 114 - compatible 115 - clocks 116 - clock-names 117 118unevaluatedProperties: false 119 120examples: 121 - | 122 #include <dt-bindings/interrupt-controller/arm-gic.h> 123 #include <dt-bindings/clock/rk3288-cru.h> 124 125 gmac: ethernet@ff290000 { 126 compatible = "rockchip,rk3288-gmac"; 127 reg = <0xff290000 0x10000>; 128 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 129 interrupt-names = "macirq"; 130 clocks = <&cru SCLK_MAC>, 131 <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>, 132 <&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>, 133 <&cru ACLK_GMAC>, <&cru PCLK_GMAC>; 134 clock-names = "stmmaceth", 135 "mac_clk_rx", "mac_clk_tx", 136 "clk_mac_ref", "clk_mac_refout", 137 "aclk_mac", "pclk_mac"; 138 assigned-clocks = <&cru SCLK_MAC>; 139 assigned-clock-parents = <&ext_gmac>; 140 141 rockchip,grf = <&grf>; 142 phy-mode = "rgmii-id"; 143 clock_in_out = "input"; 144 }; 145