1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/renesas,rzn1-gmac.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas GMAC 8 9maintainers: 10 - Romain Gantois <romain.gantois@bootlin.com> 11 12select: 13 properties: 14 compatible: 15 contains: 16 enum: 17 - renesas,r9a06g032-gmac 18 - renesas,rzn1-gmac 19 required: 20 - compatible 21 22allOf: 23 - $ref: snps,dwmac.yaml# 24 25properties: 26 compatible: 27 items: 28 - enum: 29 - renesas,r9a06g032-gmac 30 - const: renesas,rzn1-gmac 31 - const: snps,dwmac 32 33 interrupts: 34 maxItems: 3 35 36 interrupt-names: 37 items: 38 - const: macirq 39 - const: eth_wake_irq 40 - const: eth_lpi 41 42 pcs-handle: 43 description: 44 phandle pointing to a PCS sub-node compatible with 45 renesas,rzn1-miic.yaml# 46 47required: 48 - compatible 49 50unevaluatedProperties: false 51 52examples: 53 - | 54 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 55 #include <dt-bindings/interrupt-controller/arm-gic.h> 56 57 ethernet@44000000 { 58 compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac"; 59 reg = <0x44000000 0x2000>; 60 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 61 <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 62 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 63 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; 64 clock-names = "stmmaceth"; 65 clocks = <&sysctrl R9A06G032_HCLK_GMAC0>; 66 power-domains = <&sysctrl>; 67 snps,multicast-filter-bins = <256>; 68 snps,perfect-filter-entries = <128>; 69 tx-fifo-depth = <2048>; 70 rx-fifo-depth = <4096>; 71 pcs-handle = <&mii_conv1>; 72 phy-mode = "mii"; 73 }; 74 75... 76