xref: /linux/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/renesas,rzn1-gmac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas GMAC
8
9maintainers:
10  - Romain Gantois <romain.gantois@bootlin.com>
11
12select:
13  properties:
14    compatible:
15      contains:
16        enum:
17          - renesas,r9a06g032-gmac
18          - renesas,rzn1-gmac
19  required:
20    - compatible
21
22allOf:
23  - $ref: snps,dwmac.yaml#
24
25properties:
26  compatible:
27    items:
28      - enum:
29          - renesas,r9a06g032-gmac
30      - const: renesas,rzn1-gmac
31      - const: snps,dwmac
32
33  pcs-handle:
34    description:
35      phandle pointing to a PCS sub-node compatible with
36      renesas,rzn1-miic.yaml#
37
38required:
39  - compatible
40
41unevaluatedProperties: false
42
43examples:
44  - |
45    #include <dt-bindings/clock/r9a06g032-sysctrl.h>
46    #include <dt-bindings/interrupt-controller/arm-gic.h>
47
48    ethernet@44000000 {
49      compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
50      reg = <0x44000000 0x2000>;
51      interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
52                   <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
53                   <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
54      interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
55      clock-names = "stmmaceth";
56      clocks = <&sysctrl R9A06G032_HCLK_GMAC0>;
57      power-domains = <&sysctrl>;
58      snps,multicast-filter-bins = <256>;
59      snps,perfect-filter-entries = <128>;
60      tx-fifo-depth = <2048>;
61      rx-fifo-depth = <4096>;
62      pcs-handle = <&mii_conv1>;
63      phy-mode = "mii";
64    };
65
66...
67