1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/renesas,etheravb.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas Ethernet AVB 8 9maintainers: 10 - Sergei Shtylyov <sergei.shtylyov@gmail.com> 11 12properties: 13 compatible: 14 oneOf: 15 - items: 16 - enum: 17 - renesas,etheravb-r8a7742 # RZ/G1H 18 - renesas,etheravb-r8a7743 # RZ/G1M 19 - renesas,etheravb-r8a7744 # RZ/G1N 20 - renesas,etheravb-r8a7745 # RZ/G1E 21 - renesas,etheravb-r8a77470 # RZ/G1C 22 - renesas,etheravb-r8a7790 # R-Car H2 23 - renesas,etheravb-r8a7791 # R-Car M2-W 24 - renesas,etheravb-r8a7792 # R-Car V2H 25 - renesas,etheravb-r8a7793 # R-Car M2-N 26 - renesas,etheravb-r8a7794 # R-Car E2 27 - const: renesas,etheravb-rcar-gen2 # R-Car Gen2 and RZ/G1 28 29 - items: 30 - enum: 31 - renesas,etheravb-r8a774a1 # RZ/G2M 32 - renesas,etheravb-r8a774b1 # RZ/G2N 33 - renesas,etheravb-r8a774c0 # RZ/G2E 34 - renesas,etheravb-r8a774e1 # RZ/G2H 35 - renesas,etheravb-r8a7795 # R-Car H3 36 - renesas,etheravb-r8a7796 # R-Car M3-W 37 - renesas,etheravb-r8a77961 # R-Car M3-W+ 38 - renesas,etheravb-r8a77965 # R-Car M3-N 39 - renesas,etheravb-r8a77970 # R-Car V3M 40 - renesas,etheravb-r8a77980 # R-Car V3H 41 - renesas,etheravb-r8a77990 # R-Car E3 42 - renesas,etheravb-r8a77995 # R-Car D3 43 - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2 44 45 - items: 46 - enum: 47 - renesas,etheravb-r8a779a0 # R-Car V3U 48 - renesas,etheravb-r8a779g0 # R-Car V4H 49 - const: renesas,etheravb-rcar-gen4 # R-Car Gen4 50 51 - items: 52 - enum: 53 - renesas,etheravb-r9a09g011 # RZ/V2M 54 - const: renesas,etheravb-rzv2m # RZ/V2M compatible 55 56 - items: 57 - enum: 58 - renesas,r9a07g043-gbeth # RZ/G2UL 59 - renesas,r9a07g044-gbeth # RZ/G2{L,LC} 60 - renesas,r9a07g054-gbeth # RZ/V2L 61 - const: renesas,rzg2l-gbeth # RZ/{G2L,G2UL,V2L} family 62 63 reg: true 64 65 interrupts: true 66 67 interrupt-names: true 68 69 clocks: true 70 71 clock-names: true 72 73 iommus: 74 maxItems: 1 75 76 power-domains: 77 maxItems: 1 78 79 resets: 80 maxItems: 1 81 82 phy-mode: true 83 84 phy-handle: true 85 86 '#address-cells': 87 description: Number of address cells for the MDIO bus. 88 const: 1 89 90 '#size-cells': 91 description: Number of size cells on the MDIO bus. 92 const: 0 93 94 renesas,no-ether-link: 95 type: boolean 96 description: 97 Specify when a board does not provide a proper AVB_LINK signal. 98 99 renesas,ether-link-active-low: 100 type: boolean 101 description: 102 Specify when the AVB_LINK signal is active-low instead of normal 103 active-high. 104 105 rx-internal-delay-ps: 106 enum: [0, 1800] 107 108 tx-internal-delay-ps: 109 enum: [0, 2000] 110 111patternProperties: 112 "@[0-9a-f]$": 113 type: object 114 115required: 116 - compatible 117 - reg 118 - interrupts 119 - clocks 120 - power-domains 121 - resets 122 - phy-mode 123 - phy-handle 124 - '#address-cells' 125 - '#size-cells' 126 127allOf: 128 - $ref: ethernet-controller.yaml# 129 130 - if: 131 properties: 132 compatible: 133 contains: 134 enum: 135 - renesas,etheravb-rcar-gen2 136 - renesas,etheravb-r8a7795 137 - renesas,etheravb-r8a7796 138 - renesas,etheravb-r8a77961 139 - renesas,etheravb-r8a77965 140 then: 141 properties: 142 reg: 143 items: 144 - description: MAC register block 145 - description: Stream buffer 146 else: 147 properties: 148 reg: 149 items: 150 - description: MAC register block 151 152 - if: 153 properties: 154 compatible: 155 contains: 156 enum: 157 - renesas,etheravb-rcar-gen2 158 - renesas,rzg2l-gbeth 159 then: 160 properties: 161 interrupts: 162 minItems: 1 163 maxItems: 3 164 interrupt-names: 165 minItems: 1 166 items: 167 - const: mux 168 - const: fil 169 - const: arp_ns 170 rx-internal-delay-ps: false 171 else: 172 if: 173 properties: 174 compatible: 175 contains: 176 const: renesas,etheravb-rzv2m 177 then: 178 properties: 179 interrupts: 180 minItems: 29 181 maxItems: 29 182 interrupt-names: 183 items: 184 pattern: '^(ch(1?)[0-9])|ch20|ch21|dia|dib|err_a|err_b|mgmt_a|mgmt_b|line3$' 185 rx-internal-delay-ps: false 186 required: 187 - interrupt-names 188 else: 189 properties: 190 interrupts: 191 minItems: 25 192 maxItems: 25 193 interrupt-names: 194 items: 195 pattern: '^ch[0-9]+$' 196 required: 197 - interrupt-names 198 - rx-internal-delay-ps 199 200 - if: 201 properties: 202 compatible: 203 contains: 204 enum: 205 - renesas,etheravb-r8a774a1 206 - renesas,etheravb-r8a774b1 207 - renesas,etheravb-r8a774e1 208 - renesas,etheravb-r8a7795 209 - renesas,etheravb-r8a7796 210 - renesas,etheravb-r8a77961 211 - renesas,etheravb-r8a77965 212 - renesas,etheravb-r8a77970 213 - renesas,etheravb-r8a77980 214 - renesas,etheravb-rcar-gen4 215 then: 216 required: 217 - tx-internal-delay-ps 218 else: 219 properties: 220 tx-internal-delay-ps: false 221 222 - if: 223 properties: 224 compatible: 225 contains: 226 const: renesas,etheravb-r8a77995 227 then: 228 properties: 229 rx-internal-delay-ps: 230 const: 1800 231 232 - if: 233 properties: 234 compatible: 235 contains: 236 const: renesas,etheravb-r8a77980 237 then: 238 properties: 239 tx-internal-delay-ps: 240 const: 2000 241 242 - if: 243 properties: 244 compatible: 245 contains: 246 const: renesas,rzg2l-gbeth 247 then: 248 properties: 249 clocks: 250 items: 251 - description: Main clock 252 - description: Register access clock 253 - description: Reference clock for RGMII 254 clock-names: 255 items: 256 - const: axi 257 - const: chi 258 - const: refclk 259 else: 260 if: 261 properties: 262 compatible: 263 contains: 264 const: renesas,etheravb-rzv2m 265 then: 266 properties: 267 clocks: 268 items: 269 - description: Main clock 270 - description: Coherent Hub Interface clock 271 - description: gPTP reference clock 272 clock-names: 273 items: 274 - const: axi 275 - const: chi 276 - const: gptp 277 else: 278 properties: 279 clocks: 280 minItems: 1 281 items: 282 - description: AVB functional clock 283 - description: Optional TXC reference clock 284 clock-names: 285 minItems: 1 286 items: 287 - const: fck 288 - const: refclk 289 290additionalProperties: false 291 292examples: 293 - | 294 #include <dt-bindings/clock/r8a7795-cpg-mssr.h> 295 #include <dt-bindings/interrupt-controller/arm-gic.h> 296 #include <dt-bindings/power/r8a7795-sysc.h> 297 #include <dt-bindings/gpio/gpio.h> 298 aliases { 299 ethernet0 = &avb; 300 }; 301 302 avb: ethernet@e6800000 { 303 compatible = "renesas,etheravb-r8a7795", 304 "renesas,etheravb-rcar-gen3"; 305 reg = <0xe6800000 0x800>, <0xe6a00000 0x10000>; 306 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 307 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 308 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 309 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 310 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 311 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 312 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 313 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 314 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 315 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 316 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 317 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 318 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 320 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 321 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 322 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 323 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 324 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 325 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 331 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", 332 "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", 333 "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", 334 "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; 335 clocks = <&cpg CPG_MOD 812>; 336 clock-names = "fck"; 337 iommus = <&ipmmu_ds0 16>; 338 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 339 resets = <&cpg 812>; 340 phy-mode = "rgmii"; 341 phy-handle = <&phy0>; 342 rx-internal-delay-ps = <0>; 343 tx-internal-delay-ps = <2000>; 344 #address-cells = <1>; 345 #size-cells = <0>; 346 347 phy0: ethernet-phy@0 { 348 compatible = "ethernet-phy-id0022.1622", 349 "ethernet-phy-ieee802.3-c22"; 350 rxc-skew-ps = <1500>; 351 reg = <0>; 352 interrupt-parent = <&gpio2>; 353 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 354 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 355 }; 356 }; 357