xref: /linux/Documentation/devicetree/bindings/net/renesas,etheravb.yaml (revision 58d416351e6df1a41d415958ccdd8eb9c2173fed) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/renesas,etheravb.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Ethernet AVB
8
9maintainers:
10  - Sergei Shtylyov <sergei.shtylyov@gmail.com>
11
12properties:
13  compatible:
14    oneOf:
15      - items:
16          - enum:
17              - renesas,etheravb-r8a7742      # RZ/G1H
18              - renesas,etheravb-r8a7743      # RZ/G1M
19              - renesas,etheravb-r8a7744      # RZ/G1N
20              - renesas,etheravb-r8a7745      # RZ/G1E
21              - renesas,etheravb-r8a77470     # RZ/G1C
22              - renesas,etheravb-r8a7790      # R-Car H2
23              - renesas,etheravb-r8a7791      # R-Car M2-W
24              - renesas,etheravb-r8a7792      # R-Car V2H
25              - renesas,etheravb-r8a7793      # R-Car M2-N
26              - renesas,etheravb-r8a7794      # R-Car E2
27          - const: renesas,etheravb-rcar-gen2 # R-Car Gen2 and RZ/G1
28
29      - items:
30          - enum:
31              - renesas,etheravb-r8a774a1     # RZ/G2M
32              - renesas,etheravb-r8a774b1     # RZ/G2N
33              - renesas,etheravb-r8a774c0     # RZ/G2E
34              - renesas,etheravb-r8a774e1     # RZ/G2H
35              - renesas,etheravb-r8a7795      # R-Car H3
36              - renesas,etheravb-r8a7796      # R-Car M3-W
37              - renesas,etheravb-r8a77961     # R-Car M3-W+
38              - renesas,etheravb-r8a77965     # R-Car M3-N
39              - renesas,etheravb-r8a77970     # R-Car V3M
40              - renesas,etheravb-r8a77980     # R-Car V3H
41              - renesas,etheravb-r8a77990     # R-Car E3
42              - renesas,etheravb-r8a77995     # R-Car D3
43              - renesas,etheravb-r8a779a0     # R-Car V3U
44          - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2
45
46      - items:
47          - enum:
48              - renesas,r9a07g043-gbeth # RZ/G2UL
49              - renesas,r9a07g044-gbeth # RZ/G2{L,LC}
50              - renesas,r9a07g054-gbeth # RZ/V2L
51          - const: renesas,rzg2l-gbeth  # RZ/{G2L,G2UL,V2L} family
52
53  reg: true
54
55  interrupts: true
56
57  interrupt-names: true
58
59  clocks: true
60
61  clock-names: true
62
63  iommus:
64    maxItems: 1
65
66  power-domains:
67    maxItems: 1
68
69  resets:
70    maxItems: 1
71
72  phy-mode: true
73
74  phy-handle: true
75
76  '#address-cells':
77    description: Number of address cells for the MDIO bus.
78    const: 1
79
80  '#size-cells':
81    description: Number of size cells on the MDIO bus.
82    const: 0
83
84  renesas,no-ether-link:
85    type: boolean
86    description:
87      Specify when a board does not provide a proper AVB_LINK signal.
88
89  renesas,ether-link-active-low:
90    type: boolean
91    description:
92      Specify when the AVB_LINK signal is active-low instead of normal
93      active-high.
94
95  rx-internal-delay-ps:
96    enum: [0, 1800]
97
98  tx-internal-delay-ps:
99    enum: [0, 2000]
100
101patternProperties:
102  "^ethernet-phy@[0-9a-f]$":
103    type: object
104    $ref: ethernet-phy.yaml#
105
106required:
107  - compatible
108  - reg
109  - interrupts
110  - clocks
111  - power-domains
112  - resets
113  - phy-mode
114  - phy-handle
115  - '#address-cells'
116  - '#size-cells'
117
118allOf:
119  - $ref: ethernet-controller.yaml#
120
121  - if:
122      properties:
123        compatible:
124          contains:
125            enum:
126              - renesas,etheravb-rcar-gen2
127              - renesas,etheravb-r8a7795
128              - renesas,etheravb-r8a7796
129              - renesas,etheravb-r8a77961
130              - renesas,etheravb-r8a77965
131    then:
132      properties:
133        reg:
134          items:
135            - description: MAC register block
136            - description: Stream buffer
137    else:
138      properties:
139        reg:
140          items:
141            - description: MAC register block
142
143  - if:
144      properties:
145        compatible:
146          contains:
147            enum:
148              - renesas,etheravb-rcar-gen2
149              - renesas,rzg2l-gbeth
150    then:
151      properties:
152        interrupts:
153          minItems: 1
154          maxItems: 3
155        interrupt-names:
156          minItems: 1
157          items:
158            - const: mux
159            - const: fil
160            - const: arp_ns
161        rx-internal-delay-ps: false
162    else:
163      properties:
164        interrupts:
165          minItems: 25
166          maxItems: 25
167        interrupt-names:
168          items:
169            pattern: '^ch[0-9]+$'
170      required:
171        - interrupt-names
172        - rx-internal-delay-ps
173
174  - if:
175      properties:
176        compatible:
177          contains:
178            enum:
179              - renesas,etheravb-r8a774a1
180              - renesas,etheravb-r8a774b1
181              - renesas,etheravb-r8a774e1
182              - renesas,etheravb-r8a7795
183              - renesas,etheravb-r8a7796
184              - renesas,etheravb-r8a77961
185              - renesas,etheravb-r8a77965
186              - renesas,etheravb-r8a77970
187              - renesas,etheravb-r8a77980
188              - renesas,etheravb-r8a779a0
189    then:
190      required:
191        - tx-internal-delay-ps
192    else:
193      properties:
194        tx-internal-delay-ps: false
195
196  - if:
197      properties:
198        compatible:
199          contains:
200            const: renesas,etheravb-r8a77995
201    then:
202      properties:
203        rx-internal-delay-ps:
204          const: 1800
205
206  - if:
207      properties:
208        compatible:
209          contains:
210            const: renesas,etheravb-r8a77980
211    then:
212      properties:
213        tx-internal-delay-ps:
214          const: 2000
215
216  - if:
217      properties:
218        compatible:
219          contains:
220            const: renesas,rzg2l-gbeth
221    then:
222      properties:
223        clocks:
224          items:
225            - description: Main clock
226            - description: Register access clock
227            - description: Reference clock for RGMII
228        clock-names:
229          items:
230            - const: axi
231            - const: chi
232            - const: refclk
233    else:
234      properties:
235        clocks:
236          minItems: 1
237          items:
238            - description: AVB functional clock
239            - description: Optional TXC reference clock
240        clock-names:
241          minItems: 1
242          items:
243            - const: fck
244            - const: refclk
245
246additionalProperties: false
247
248examples:
249  - |
250    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
251    #include <dt-bindings/interrupt-controller/arm-gic.h>
252    #include <dt-bindings/power/r8a7795-sysc.h>
253    #include <dt-bindings/gpio/gpio.h>
254    aliases {
255            ethernet0 = &avb;
256    };
257
258    avb: ethernet@e6800000 {
259            compatible = "renesas,etheravb-r8a7795",
260                         "renesas,etheravb-rcar-gen3";
261            reg = <0xe6800000 0x800>, <0xe6a00000 0x10000>;
262            interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
263                         <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
264                         <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
265                         <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
266                         <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
267                         <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
268                         <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
269                         <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
270                         <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
271                         <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
272                         <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
273                         <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
274                         <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
275                         <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
276                         <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
277                         <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
278                         <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
279                         <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
280                         <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
281                         <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
282                         <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
283                         <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
284                         <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
285                         <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
286                         <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
287            interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6",
288                              "ch7", "ch8", "ch9", "ch10", "ch11", "ch12",
289                              "ch13", "ch14", "ch15", "ch16", "ch17", "ch18",
290                              "ch19", "ch20", "ch21", "ch22", "ch23", "ch24";
291            clocks = <&cpg CPG_MOD 812>;
292            clock-names = "fck";
293            iommus = <&ipmmu_ds0 16>;
294            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
295            resets = <&cpg 812>;
296            phy-mode = "rgmii";
297            phy-handle = <&phy0>;
298            rx-internal-delay-ps = <0>;
299            tx-internal-delay-ps = <2000>;
300            #address-cells = <1>;
301            #size-cells = <0>;
302
303            phy0: ethernet-phy@0 {
304                    compatible = "ethernet-phy-id0022.1622",
305                                 "ethernet-phy-ieee802.3-c22";
306                    rxc-skew-ps = <1500>;
307                    reg = <0>;
308                    interrupt-parent = <&gpio2>;
309                    interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
310                    reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
311            };
312    };
313