1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/renesas,etheravb.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas Ethernet AVB 8 9maintainers: 10 - Sergei Shtylyov <sergei.shtylyov@gmail.com> 11 12properties: 13 compatible: 14 oneOf: 15 - items: 16 - enum: 17 - renesas,etheravb-r8a7742 # RZ/G1H 18 - renesas,etheravb-r8a7743 # RZ/G1M 19 - renesas,etheravb-r8a7744 # RZ/G1N 20 - renesas,etheravb-r8a7745 # RZ/G1E 21 - renesas,etheravb-r8a77470 # RZ/G1C 22 - renesas,etheravb-r8a7790 # R-Car H2 23 - renesas,etheravb-r8a7791 # R-Car M2-W 24 - renesas,etheravb-r8a7792 # R-Car V2H 25 - renesas,etheravb-r8a7793 # R-Car M2-N 26 - renesas,etheravb-r8a7794 # R-Car E2 27 - const: renesas,etheravb-rcar-gen2 # R-Car Gen2 and RZ/G1 28 29 - items: 30 - enum: 31 - renesas,etheravb-r8a774a1 # RZ/G2M 32 - renesas,etheravb-r8a774b1 # RZ/G2N 33 - renesas,etheravb-r8a774c0 # RZ/G2E 34 - renesas,etheravb-r8a774e1 # RZ/G2H 35 - renesas,etheravb-r8a7795 # R-Car H3 36 - renesas,etheravb-r8a7796 # R-Car M3-W 37 - renesas,etheravb-r8a77961 # R-Car M3-W+ 38 - renesas,etheravb-r8a77965 # R-Car M3-N 39 - renesas,etheravb-r8a77970 # R-Car V3M 40 - renesas,etheravb-r8a77980 # R-Car V3H 41 - renesas,etheravb-r8a77990 # R-Car E3 42 - renesas,etheravb-r8a77995 # R-Car D3 43 - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2 44 45 - items: 46 - enum: 47 - renesas,etheravb-r8a779a0 # R-Car V3U 48 - renesas,etheravb-r8a779g0 # R-Car V4H 49 - renesas,etheravb-r8a779h0 # R-Car V4M 50 - const: renesas,etheravb-rcar-gen4 # R-Car Gen4 51 52 - items: 53 - enum: 54 - renesas,etheravb-r9a09g011 # RZ/V2M 55 - const: renesas,etheravb-rzv2m # RZ/V2M compatible 56 57 - items: 58 - enum: 59 - renesas,r9a07g043-gbeth # RZ/G2UL and RZ/Five 60 - renesas,r9a07g044-gbeth # RZ/G2{L,LC} 61 - renesas,r9a07g054-gbeth # RZ/V2L 62 - renesas,r9a08g045-gbeth # RZ/G3S 63 - const: renesas,rzg2l-gbeth # RZ/{G2L,G2UL,V2L} family 64 65 reg: 66 minItems: 1 67 items: 68 - description: MAC register block 69 - description: Stream buffer 70 71 interrupts: 72 minItems: 1 73 maxItems: 29 74 75 interrupt-names: 76 minItems: 1 77 maxItems: 29 78 79 clocks: 80 minItems: 1 81 maxItems: 3 82 83 clock-names: 84 minItems: 1 85 maxItems: 3 86 87 iommus: 88 maxItems: 1 89 90 power-domains: 91 maxItems: 1 92 93 resets: 94 maxItems: 1 95 96 phy-mode: true 97 98 phy-handle: true 99 100 '#address-cells': 101 description: Number of address cells for the MDIO bus. 102 const: 1 103 deprecated: true 104 105 '#size-cells': 106 description: Number of size cells on the MDIO bus. 107 const: 0 108 deprecated: true 109 110 mdio: 111 $ref: /schemas/net/mdio.yaml# 112 unevaluatedProperties: false 113 114 renesas,no-ether-link: 115 type: boolean 116 description: 117 Specify when a board does not provide a proper AVB_LINK signal. 118 119 renesas,ether-link-active-low: 120 type: boolean 121 description: 122 Specify when the AVB_LINK signal is active-low instead of normal 123 active-high. 124 125 rx-internal-delay-ps: 126 enum: [0, 1800] 127 128 tx-internal-delay-ps: 129 enum: [0, 2000] 130 131# In older bindings there where no mdio child-node to describe the MDIO bus 132# and the PHY. To not fail older bindings accept any node with an address. New 133# users should describe the PHY inside the mdio child-node. 134patternProperties: 135 "@[0-9a-f]$": 136 type: object 137 deprecated: true 138 139required: 140 - compatible 141 - reg 142 - interrupts 143 - clocks 144 - power-domains 145 - resets 146 - phy-mode 147 - phy-handle 148 149allOf: 150 - $ref: ethernet-controller.yaml# 151 152 - if: 153 properties: 154 compatible: 155 contains: 156 enum: 157 - renesas,etheravb-rcar-gen2 158 - renesas,etheravb-r8a7795 159 - renesas,etheravb-r8a7796 160 - renesas,etheravb-r8a77961 161 - renesas,etheravb-r8a77965 162 then: 163 properties: 164 reg: 165 minItems: 2 166 else: 167 properties: 168 reg: 169 maxItems: 1 170 171 - if: 172 properties: 173 compatible: 174 contains: 175 enum: 176 - renesas,etheravb-rcar-gen2 177 - renesas,rzg2l-gbeth 178 then: 179 properties: 180 interrupts: 181 minItems: 1 182 maxItems: 3 183 interrupt-names: 184 minItems: 1 185 items: 186 - const: mux 187 - const: fil 188 - const: arp_ns 189 rx-internal-delay-ps: false 190 else: 191 if: 192 properties: 193 compatible: 194 contains: 195 const: renesas,etheravb-rzv2m 196 then: 197 properties: 198 interrupts: 199 minItems: 29 200 maxItems: 29 201 interrupt-names: 202 items: 203 pattern: '^(ch(1?)[0-9])|ch20|ch21|dia|dib|err_a|err_b|mgmt_a|mgmt_b|line3$' 204 rx-internal-delay-ps: false 205 required: 206 - interrupt-names 207 else: 208 properties: 209 interrupts: 210 minItems: 25 211 maxItems: 25 212 interrupt-names: 213 items: 214 pattern: '^ch[0-9]+$' 215 required: 216 - interrupt-names 217 - rx-internal-delay-ps 218 219 - if: 220 properties: 221 compatible: 222 contains: 223 enum: 224 - renesas,etheravb-r8a774a1 225 - renesas,etheravb-r8a774b1 226 - renesas,etheravb-r8a774e1 227 - renesas,etheravb-r8a7795 228 - renesas,etheravb-r8a7796 229 - renesas,etheravb-r8a77961 230 - renesas,etheravb-r8a77965 231 - renesas,etheravb-r8a77970 232 - renesas,etheravb-r8a77980 233 - renesas,etheravb-rcar-gen4 234 then: 235 required: 236 - tx-internal-delay-ps 237 else: 238 properties: 239 tx-internal-delay-ps: false 240 241 - if: 242 properties: 243 compatible: 244 contains: 245 const: renesas,etheravb-r8a77995 246 then: 247 properties: 248 rx-internal-delay-ps: 249 const: 1800 250 251 - if: 252 properties: 253 compatible: 254 contains: 255 const: renesas,etheravb-r8a77980 256 then: 257 properties: 258 tx-internal-delay-ps: 259 const: 2000 260 261 - if: 262 properties: 263 compatible: 264 contains: 265 const: renesas,rzg2l-gbeth 266 then: 267 properties: 268 clocks: 269 items: 270 - description: Main clock 271 - description: Register access clock 272 - description: Reference clock for RGMII 273 clock-names: 274 items: 275 - const: axi 276 - const: chi 277 - const: refclk 278 else: 279 if: 280 properties: 281 compatible: 282 contains: 283 const: renesas,etheravb-rzv2m 284 then: 285 properties: 286 clocks: 287 items: 288 - description: Main clock 289 - description: Coherent Hub Interface clock 290 - description: gPTP reference clock 291 clock-names: 292 items: 293 - const: axi 294 - const: chi 295 - const: gptp 296 else: 297 properties: 298 clocks: 299 minItems: 1 300 items: 301 - description: AVB functional clock 302 - description: Optional TXC reference clock 303 clock-names: 304 minItems: 1 305 items: 306 - const: fck 307 - const: refclk 308 309additionalProperties: false 310 311examples: 312 - | 313 #include <dt-bindings/clock/r8a7795-cpg-mssr.h> 314 #include <dt-bindings/interrupt-controller/arm-gic.h> 315 #include <dt-bindings/power/r8a7795-sysc.h> 316 #include <dt-bindings/gpio/gpio.h> 317 aliases { 318 ethernet0 = &avb; 319 }; 320 321 avb: ethernet@e6800000 { 322 compatible = "renesas,etheravb-r8a7795", 323 "renesas,etheravb-rcar-gen3"; 324 reg = <0xe6800000 0x800>, <0xe6a00000 0x10000>; 325 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 332 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 333 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 334 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 335 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 336 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 337 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 338 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 339 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 340 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 341 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 342 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 343 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 344 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 350 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", 351 "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", 352 "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", 353 "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; 354 clocks = <&cpg CPG_MOD 812>; 355 clock-names = "fck"; 356 iommus = <&ipmmu_ds0 16>; 357 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 358 resets = <&cpg 812>; 359 phy-mode = "rgmii"; 360 phy-handle = <&phy0>; 361 rx-internal-delay-ps = <0>; 362 tx-internal-delay-ps = <2000>; 363 #address-cells = <1>; 364 #size-cells = <0>; 365 366 phy0: ethernet-phy@0 { 367 compatible = "ethernet-phy-id0022.1622", 368 "ethernet-phy-ieee802.3-c22"; 369 rxc-skew-ps = <1500>; 370 reg = <0>; 371 interrupt-parent = <&gpio2>; 372 interrupts = <11 IRQ_TYPE_LEVEL_LOW>; 373 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 374 }; 375 }; 376