1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm IPQ40xx MDIO Controller 8 9maintainers: 10 - Robert Marko <robert.marko@sartura.hr> 11 12properties: 13 compatible: 14 oneOf: 15 - enum: 16 - qcom,ipq4019-mdio 17 - qcom,ipq5018-mdio 18 19 - items: 20 - enum: 21 - qcom,ipq6018-mdio 22 - qcom,ipq8074-mdio 23 - qcom,ipq9574-mdio 24 - const: qcom,ipq4019-mdio 25 26 "#address-cells": 27 const: 1 28 29 "#size-cells": 30 const: 0 31 32 reg: 33 minItems: 1 34 maxItems: 2 35 description: 36 the first Address and length of the register set for the MDIO controller. 37 the second Address and length of the register for ethernet LDO, this second 38 address range is only required by the platform IPQ50xx. 39 40 clocks: 41 items: 42 - description: MDIO clock source frequency fixed to 100MHZ 43 44 clock-names: 45 items: 46 - const: gcc_mdio_ahb_clk 47 48 clock-frequency: 49 description: 50 The MDIO bus clock that must be output by the MDIO bus hardware, if 51 absent, the default hardware values are used. 52 53 MDC rate is feed by an external clock (fixed 100MHz) and is divider 54 internally. The default divider is /256 resulting in the default rate 55 applied of 390KHz. 56 57 To follow 802.3 standard that instruct up to 2.5MHz by default, if 58 this property is not declared and the divider is set to /256, by 59 default 1.5625Mhz is select. 60 enum: [ 390625, 781250, 1562500, 3125000, 6250000, 12500000 ] 61 default: 1562500 62 63required: 64 - compatible 65 - reg 66 - "#address-cells" 67 - "#size-cells" 68 69allOf: 70 - $ref: mdio.yaml# 71 72 - if: 73 properties: 74 compatible: 75 contains: 76 enum: 77 - qcom,ipq5018-mdio 78 - qcom,ipq6018-mdio 79 - qcom,ipq8074-mdio 80 - qcom,ipq9574-mdio 81 then: 82 required: 83 - clocks 84 - clock-names 85 else: 86 properties: 87 clocks: false 88 clock-names: false 89 90unevaluatedProperties: false 91 92examples: 93 - | 94 mdio@90000 { 95 #address-cells = <1>; 96 #size-cells = <0>; 97 compatible = "qcom,ipq4019-mdio"; 98 reg = <0x90000 0x64>; 99 100 ethphy0: ethernet-phy@0 { 101 reg = <0>; 102 }; 103 104 ethphy1: ethernet-phy@1 { 105 reg = <1>; 106 }; 107 108 ethphy2: ethernet-phy@2 { 109 reg = <2>; 110 }; 111 112 ethphy3: ethernet-phy@3 { 113 reg = <3>; 114 }; 115 116 ethphy4: ethernet-phy@4 { 117 reg = <4>; 118 }; 119 }; 120