1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm IPQ40xx MDIO Controller 8 9maintainers: 10 - Robert Marko <robert.marko@sartura.hr> 11 12properties: 13 compatible: 14 oneOf: 15 - enum: 16 - qcom,ipq4019-mdio 17 - qcom,ipq5018-mdio 18 19 - items: 20 - enum: 21 - qcom,ipq6018-mdio 22 - qcom,ipq8074-mdio 23 - const: qcom,ipq4019-mdio 24 25 "#address-cells": 26 const: 1 27 28 "#size-cells": 29 const: 0 30 31 reg: 32 minItems: 1 33 maxItems: 2 34 description: 35 the first Address and length of the register set for the MDIO controller. 36 the second Address and length of the register for ethernet LDO, this second 37 address range is only required by the platform IPQ50xx. 38 39 clocks: 40 items: 41 - description: MDIO clock source frequency fixed to 100MHZ 42 43 clock-names: 44 items: 45 - const: gcc_mdio_ahb_clk 46 47 clock-frequency: 48 description: 49 The MDIO bus clock that must be output by the MDIO bus hardware, if 50 absent, the default hardware values are used. 51 52 MDC rate is feed by an external clock (fixed 100MHz) and is divider 53 internally. The default divider is /256 resulting in the default rate 54 applied of 390KHz. 55 56 To follow 802.3 standard that instruct up to 2.5MHz by default, if 57 this property is not declared and the divider is set to /256, by 58 default 1.5625Mhz is select. 59 enum: [ 390625, 781250, 1562500, 3125000, 6250000, 12500000 ] 60 default: 1562500 61 62required: 63 - compatible 64 - reg 65 - "#address-cells" 66 - "#size-cells" 67 68allOf: 69 - $ref: mdio.yaml# 70 71 - if: 72 properties: 73 compatible: 74 contains: 75 enum: 76 - qcom,ipq5018-mdio 77 - qcom,ipq6018-mdio 78 - qcom,ipq8074-mdio 79 then: 80 required: 81 - clocks 82 - clock-names 83 else: 84 properties: 85 clocks: false 86 clock-names: false 87 88unevaluatedProperties: false 89 90examples: 91 - | 92 mdio@90000 { 93 #address-cells = <1>; 94 #size-cells = <0>; 95 compatible = "qcom,ipq4019-mdio"; 96 reg = <0x90000 0x64>; 97 98 ethphy0: ethernet-phy@0 { 99 reg = <0>; 100 }; 101 102 ethphy1: ethernet-phy@1 { 103 reg = <1>; 104 }; 105 106 ethphy2: ethernet-phy@2 { 107 reg = <2>; 108 }; 109 110 ethphy3: ethernet-phy@3 { 111 reg = <3>; 112 }; 113 114 ethphy4: ethernet-phy@4 { 115 reg = <4>; 116 }; 117 }; 118