xref: /linux/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml (revision afeea2758b4f1210361ce2a91d8fa3e7df606ad2) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/pse-pd/microchip,pd692x0.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip PD692x0 Power Sourcing Equipment controller
8
9maintainers:
10  - Kory Maincent <kory.maincent@bootlin.com>
11
12allOf:
13  - $ref: pse-controller.yaml#
14
15properties:
16  compatible:
17    enum:
18      - microchip,pd69200
19      - microchip,pd69210
20      - microchip,pd69220
21
22  reg:
23    maxItems: 1
24
25  managers:
26    type: object
27    description:
28      List of the PD69208T4/PD69204T4/PD69208M PSE managers. Each manager
29      have 4 or 8 physical ports according to the chip version. No need to
30      specify the SPI chip select as it is automatically detected by the
31      PD692x0 PSE controller. The PSE managers have to be described from
32      the lowest chip select to the greatest one, which is the detection
33      behavior of the PD692x0 PSE controller. The PD692x0 support up to
34      12 PSE managers which can expose up to 96 physical ports. All
35      physical ports available on a manager have to be described in the
36      incremental order even if they are not used.
37
38    properties:
39      "#address-cells":
40        const: 1
41
42      "#size-cells":
43        const: 0
44
45    required:
46      - "#address-cells"
47      - "#size-cells"
48
49    patternProperties:
50      "^manager@0[0-9a-b]$":
51        type: object
52        description:
53          PD69208T4/PD69204T4/PD69208M PSE manager exposing 4 or 8 physical
54          ports.
55
56        properties:
57          reg:
58            description:
59              Incremental index of the PSE manager starting from 0, ranging
60              from lowest to highest chip select, up to 11.
61            maxItems: 1
62
63          "#address-cells":
64            const: 1
65
66          "#size-cells":
67            const: 0
68
69        patternProperties:
70          '^port@[0-7]$':
71            type: object
72            required:
73              - reg
74            additionalProperties: false
75
76        required:
77          - reg
78          - "#address-cells"
79          - "#size-cells"
80
81required:
82  - compatible
83  - reg
84  - pse-pis
85
86unevaluatedProperties: false
87
88examples:
89  - |
90    i2c {
91      #address-cells = <1>;
92      #size-cells = <0>;
93
94      ethernet-pse@3c {
95        compatible = "microchip,pd69200";
96        reg = <0x3c>;
97
98        managers {
99          #address-cells = <1>;
100          #size-cells = <0>;
101
102          manager@0 {
103            reg = <0>;
104            #address-cells = <1>;
105            #size-cells = <0>;
106
107            phys0: port@0 {
108              reg = <0>;
109            };
110
111            phys1: port@1 {
112              reg = <1>;
113            };
114
115            phys2: port@2 {
116              reg = <2>;
117            };
118
119            phys3: port@3 {
120              reg = <3>;
121            };
122          };
123
124          manager@1 {
125            reg = <1>;
126            #address-cells = <1>;
127            #size-cells = <0>;
128
129            phys4: port@0 {
130              reg = <0>;
131            };
132
133            phys5: port@1 {
134              reg = <1>;
135            };
136
137            phys6: port@2 {
138              reg = <2>;
139            };
140
141            phys7: port@3 {
142              reg = <3>;
143            };
144          };
145        };
146
147        pse-pis {
148          #address-cells = <1>;
149          #size-cells = <0>;
150
151          pse_pi0: pse-pi@0 {
152            reg = <0>;
153            #pse-cells = <0>;
154            pairset-names = "alternative-a", "alternative-b";
155            pairsets = <&phys0>, <&phys1>;
156            polarity-supported = "MDI", "S";
157            vpwr-supply = <&vpwr1>;
158          };
159          pse_pi1: pse-pi@1 {
160            reg = <1>;
161            #pse-cells = <0>;
162            pairset-names = "alternative-a";
163            pairsets = <&phys2>;
164            polarity-supported = "MDI";
165            vpwr-supply = <&vpwr2>;
166          };
167        };
168      };
169    };
170