xref: /linux/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas RZ/N1 MII converter

maintainers:
  - Clément Léger <clement.leger@bootlin.com>

description: |
  This MII converter is present on the Renesas RZ/N1 SoC family. It is
  responsible to do MII passthrough or convert it to RMII/RGMII.

properties:
  '#address-cells':
    const: 1

  '#size-cells':
    const: 0

  compatible:
    items:
      - enum:
          - renesas,r9a06g032-miic
      - const: renesas,rzn1-miic

  reg:
    maxItems: 1

  clocks:
    items:
      - description: MII reference clock
      - description: RGMII reference clock
      - description: RMII reference clock
      - description: AHB clock used for the MII converter register interface

  clock-names:
    items:
      - const: mii_ref
      - const: rgmii_ref
      - const: rmii_ref
      - const: hclk

  renesas,miic-switch-portin:
    description: MII Switch PORTIN configuration. This value should use one of
      the values defined in dt-bindings/net/pcs-rzn1-miic.h.
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [1, 2]

  power-domains:
    maxItems: 1

patternProperties:
  "^mii-conv@[0-5]$":
    type: object
    description: MII converter port

    properties:
      reg:
        description: MII Converter port number.
        enum: [1, 2, 3, 4, 5]

      renesas,miic-input:
        description: Converter input port configuration. This value should use
          one of the values defined in dt-bindings/net/pcs-rzn1-miic.h.
        $ref: /schemas/types.yaml#/definitions/uint32

    required:
      - reg
      - renesas,miic-input

    additionalProperties: false

    allOf:
      - if:
          properties:
            reg:
              const: 1
        then:
          properties:
            renesas,miic-input:
              const: 0
      - if:
          properties:
            reg:
              const: 2
        then:
          properties:
            renesas,miic-input:
              enum: [1, 11]
      - if:
          properties:
            reg:
              const: 3
        then:
          properties:
            renesas,miic-input:
              enum: [7, 10]
      - if:
          properties:
            reg:
              const: 4
        then:
          properties:
            renesas,miic-input:
              enum: [4, 6, 9, 13]
      - if:
          properties:
            reg:
              const: 5
        then:
          properties:
            renesas,miic-input:
              enum: [3, 5, 8, 12]

required:
  - '#address-cells'
  - '#size-cells'
  - compatible
  - reg
  - clocks
  - clock-names
  - power-domains

additionalProperties: false

examples:
  - |
    #include <dt-bindings/net/pcs-rzn1-miic.h>
    #include <dt-bindings/clock/r9a06g032-sysctrl.h>

    eth-miic@44030000 {
      #address-cells = <1>;
      #size-cells = <0>;
      compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic";
      reg = <0x44030000 0x10000>;
      clocks = <&sysctrl R9A06G032_CLK_MII_REF>,
              <&sysctrl R9A06G032_CLK_RGMII_REF>,
              <&sysctrl R9A06G032_CLK_RMII_REF>,
              <&sysctrl R9A06G032_HCLK_SWITCH_RG>;
      clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk";
      renesas,miic-switch-portin = <MIIC_GMAC2_PORT>;
      power-domains = <&sysctrl>;

      mii_conv1: mii-conv@1 {
        renesas,miic-input = <MIIC_GMAC1_PORT>;
        reg = <1>;
      };

      mii_conv2: mii-conv@2 {
        renesas,miic-input = <MIIC_SWITCH_PORTD>;
        reg = <2>;
      };

      mii_conv3: mii-conv@3 {
        renesas,miic-input = <MIIC_SWITCH_PORTC>;
        reg = <3>;
      };

      mii_conv4: mii-conv@4 {
        renesas,miic-input = <MIIC_SWITCH_PORTB>;
        reg = <4>;
      };

      mii_conv5: mii-conv@5 {
        renesas,miic-input = <MIIC_SWITCH_PORTA>;
        reg = <5>;
      };
    };