xref: /linux/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml (revision 0410c6121529409b08e81a77ae3ee58c657e2243)
1*91f10e58SJan Petrous (OSS)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*91f10e58SJan Petrous (OSS)# Copyright 2021-2024 NXP
3*91f10e58SJan Petrous (OSS)%YAML 1.2
4*91f10e58SJan Petrous (OSS)---
5*91f10e58SJan Petrous (OSS)$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml#
6*91f10e58SJan Petrous (OSS)$schema: http://devicetree.org/meta-schemas/core.yaml#
7*91f10e58SJan Petrous (OSS)
8*91f10e58SJan Petrous (OSS)title: NXP S32G2xx/S32G3xx/S32R45 GMAC ethernet controller
9*91f10e58SJan Petrous (OSS)
10*91f10e58SJan Petrous (OSS)maintainers:
11*91f10e58SJan Petrous (OSS)  - Jan Petrous (OSS) <jan.petrous@oss.nxp.com>
12*91f10e58SJan Petrous (OSS)
13*91f10e58SJan Petrous (OSS)description:
14*91f10e58SJan Petrous (OSS)  This device is a Synopsys DWC IP, integrated on NXP S32G/R SoCs.
15*91f10e58SJan Petrous (OSS)  The SoC series S32G2xx and S32G3xx feature one DWMAC instance,
16*91f10e58SJan Petrous (OSS)  the SoC S32R45 has two instances. The devices can use RGMII/RMII/MII
17*91f10e58SJan Petrous (OSS)  interface over Pinctrl device or the output can be routed
18*91f10e58SJan Petrous (OSS)  to the embedded SerDes for SGMII connectivity.
19*91f10e58SJan Petrous (OSS)
20*91f10e58SJan Petrous (OSS)properties:
21*91f10e58SJan Petrous (OSS)  compatible:
22*91f10e58SJan Petrous (OSS)    oneOf:
23*91f10e58SJan Petrous (OSS)      - const: nxp,s32g2-dwmac
24*91f10e58SJan Petrous (OSS)      - items:
25*91f10e58SJan Petrous (OSS)          - enum:
26*91f10e58SJan Petrous (OSS)              - nxp,s32g3-dwmac
27*91f10e58SJan Petrous (OSS)              - nxp,s32r45-dwmac
28*91f10e58SJan Petrous (OSS)          - const: nxp,s32g2-dwmac
29*91f10e58SJan Petrous (OSS)
30*91f10e58SJan Petrous (OSS)  reg:
31*91f10e58SJan Petrous (OSS)    items:
32*91f10e58SJan Petrous (OSS)      - description: Main GMAC registers
33*91f10e58SJan Petrous (OSS)      - description: GMAC PHY mode control register
34*91f10e58SJan Petrous (OSS)
35*91f10e58SJan Petrous (OSS)  interrupts:
36*91f10e58SJan Petrous (OSS)    maxItems: 1
37*91f10e58SJan Petrous (OSS)
38*91f10e58SJan Petrous (OSS)  interrupt-names:
39*91f10e58SJan Petrous (OSS)    const: macirq
40*91f10e58SJan Petrous (OSS)
41*91f10e58SJan Petrous (OSS)  clocks:
42*91f10e58SJan Petrous (OSS)    items:
43*91f10e58SJan Petrous (OSS)      - description: Main GMAC clock
44*91f10e58SJan Petrous (OSS)      - description: Transmit clock
45*91f10e58SJan Petrous (OSS)      - description: Receive clock
46*91f10e58SJan Petrous (OSS)      - description: PTP reference clock
47*91f10e58SJan Petrous (OSS)
48*91f10e58SJan Petrous (OSS)  clock-names:
49*91f10e58SJan Petrous (OSS)    items:
50*91f10e58SJan Petrous (OSS)      - const: stmmaceth
51*91f10e58SJan Petrous (OSS)      - const: tx
52*91f10e58SJan Petrous (OSS)      - const: rx
53*91f10e58SJan Petrous (OSS)      - const: ptp_ref
54*91f10e58SJan Petrous (OSS)
55*91f10e58SJan Petrous (OSS)required:
56*91f10e58SJan Petrous (OSS)  - clocks
57*91f10e58SJan Petrous (OSS)  - clock-names
58*91f10e58SJan Petrous (OSS)
59*91f10e58SJan Petrous (OSS)allOf:
60*91f10e58SJan Petrous (OSS)  - $ref: snps,dwmac.yaml#
61*91f10e58SJan Petrous (OSS)
62*91f10e58SJan Petrous (OSS)unevaluatedProperties: false
63*91f10e58SJan Petrous (OSS)
64*91f10e58SJan Petrous (OSS)examples:
65*91f10e58SJan Petrous (OSS)  - |
66*91f10e58SJan Petrous (OSS)    #include <dt-bindings/interrupt-controller/arm-gic.h>
67*91f10e58SJan Petrous (OSS)    #include <dt-bindings/interrupt-controller/irq.h>
68*91f10e58SJan Petrous (OSS)    #include <dt-bindings/phy/phy.h>
69*91f10e58SJan Petrous (OSS)    bus {
70*91f10e58SJan Petrous (OSS)      #address-cells = <2>;
71*91f10e58SJan Petrous (OSS)      #size-cells = <2>;
72*91f10e58SJan Petrous (OSS)
73*91f10e58SJan Petrous (OSS)      ethernet@4033c000 {
74*91f10e58SJan Petrous (OSS)        compatible = "nxp,s32g2-dwmac";
75*91f10e58SJan Petrous (OSS)        reg = <0x0 0x4033c000 0x0 0x2000>, /* gmac IP */
76*91f10e58SJan Petrous (OSS)              <0x0 0x4007c004 0x0 0x4>;    /* GMAC_0_CTRL_STS */
77*91f10e58SJan Petrous (OSS)        interrupt-parent = <&gic>;
78*91f10e58SJan Petrous (OSS)        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
79*91f10e58SJan Petrous (OSS)        interrupt-names = "macirq";
80*91f10e58SJan Petrous (OSS)        snps,mtl-rx-config = <&mtl_rx_setup>;
81*91f10e58SJan Petrous (OSS)        snps,mtl-tx-config = <&mtl_tx_setup>;
82*91f10e58SJan Petrous (OSS)        clocks = <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>;
83*91f10e58SJan Petrous (OSS)        clock-names = "stmmaceth", "tx", "rx", "ptp_ref";
84*91f10e58SJan Petrous (OSS)        phy-mode = "rgmii-id";
85*91f10e58SJan Petrous (OSS)        phy-handle = <&phy0>;
86*91f10e58SJan Petrous (OSS)
87*91f10e58SJan Petrous (OSS)        mtl_rx_setup: rx-queues-config {
88*91f10e58SJan Petrous (OSS)          snps,rx-queues-to-use = <5>;
89*91f10e58SJan Petrous (OSS)        };
90*91f10e58SJan Petrous (OSS)
91*91f10e58SJan Petrous (OSS)        mtl_tx_setup: tx-queues-config {
92*91f10e58SJan Petrous (OSS)          snps,tx-queues-to-use = <5>;
93*91f10e58SJan Petrous (OSS)        };
94*91f10e58SJan Petrous (OSS)
95*91f10e58SJan Petrous (OSS)        mdio {
96*91f10e58SJan Petrous (OSS)          #address-cells = <1>;
97*91f10e58SJan Petrous (OSS)          #size-cells = <0>;
98*91f10e58SJan Petrous (OSS)          compatible = "snps,dwmac-mdio";
99*91f10e58SJan Petrous (OSS)
100*91f10e58SJan Petrous (OSS)          phy0: ethernet-phy@0 {
101*91f10e58SJan Petrous (OSS)            reg = <0>;
102*91f10e58SJan Petrous (OSS)          };
103*91f10e58SJan Petrous (OSS)        };
104*91f10e58SJan Petrous (OSS)      };
105*91f10e58SJan Petrous (OSS)    };
106