1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NXP i.MX8/9 DWMAC glue layer 8 9maintainers: 10 - Clark Wang <xiaoning.wang@nxp.com> 11 - Shawn Guo <shawnguo@kernel.org> 12 - NXP Linux Team <linux-imx@nxp.com> 13 14# We need a select here so we don't match all nodes with 'snps,dwmac' 15select: 16 properties: 17 compatible: 18 contains: 19 enum: 20 - nxp,imx8mp-dwmac-eqos 21 - nxp,imx8dxl-dwmac-eqos 22 - nxp,imx93-dwmac-eqos 23 required: 24 - compatible 25 26allOf: 27 - $ref: snps,dwmac.yaml# 28 29properties: 30 compatible: 31 oneOf: 32 - items: 33 - enum: 34 - nxp,imx8mp-dwmac-eqos 35 - nxp,imx8dxl-dwmac-eqos 36 - nxp,imx93-dwmac-eqos 37 - const: snps,dwmac-5.10a 38 39 clocks: 40 minItems: 3 41 items: 42 - description: MAC host clock 43 - description: MAC apb clock 44 - description: MAC timer clock 45 - description: MAC RGMII TX clock 46 - description: EQOS MEM clock 47 48 clock-names: 49 minItems: 3 50 maxItems: 5 51 contains: 52 enum: 53 - stmmaceth 54 - pclk 55 - ptp_ref 56 - tx 57 - mem 58 59 intf_mode: 60 $ref: /schemas/types.yaml#/definitions/phandle-array 61 items: 62 - items: 63 - description: phandle to the GPR syscon 64 - description: the offset of the GPR register 65 description: 66 Should be phandle/offset pair. The phandle to the syscon node which 67 encompases the GPR register, and the offset of the GPR register. 68 69 nvmem-cells: true 70 71 nvmem-cell-names: true 72 73 snps,rmii_refclk_ext: 74 $ref: /schemas/types.yaml#/definitions/flag 75 description: 76 To select RMII reference clock from external. 77 78required: 79 - compatible 80 - clocks 81 - clock-names 82 83unevaluatedProperties: false 84 85examples: 86 - | 87 #include <dt-bindings/interrupt-controller/arm-gic.h> 88 #include <dt-bindings/interrupt-controller/irq.h> 89 #include <dt-bindings/clock/imx8mp-clock.h> 90 91 eqos: ethernet@30bf0000 { 92 compatible = "nxp,imx8mp-dwmac-eqos","snps,dwmac-5.10a"; 93 reg = <0x30bf0000 0x10000>; 94 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 95 <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 96 interrupt-names = "macirq", "eth_wake_irq"; 97 clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>, 98 <&clk IMX8MP_CLK_QOS_ENET_ROOT>, 99 <&clk IMX8MP_CLK_ENET_QOS_TIMER>, 100 <&clk IMX8MP_CLK_ENET_QOS>; 101 clock-names = "stmmaceth", "pclk", "ptp_ref", "tx"; 102 phy-mode = "rgmii"; 103 }; 104