xref: /linux/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml (revision 7482c19173b7eb044d476b3444d7ee55bc669d03) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP i.MX8 DWMAC glue layer
8
9maintainers:
10  - Clark Wang <xiaoning.wang@nxp.com>
11  - Shawn Guo <shawnguo@kernel.org>
12  - NXP Linux Team <linux-imx@nxp.com>
13
14# We need a select here so we don't match all nodes with 'snps,dwmac'
15select:
16  properties:
17    compatible:
18      contains:
19        enum:
20          - nxp,imx8mp-dwmac-eqos
21          - nxp,imx8dxl-dwmac-eqos
22  required:
23    - compatible
24
25allOf:
26  - $ref: "snps,dwmac.yaml#"
27
28properties:
29  compatible:
30    oneOf:
31      - items:
32          - enum:
33              - nxp,imx8mp-dwmac-eqos
34              - nxp,imx8dxl-dwmac-eqos
35          - const: snps,dwmac-5.10a
36
37  clocks:
38    minItems: 3
39    items:
40      - description: MAC host clock
41      - description: MAC apb clock
42      - description: MAC timer clock
43      - description: MAC RGMII TX clock
44      - description: EQOS MEM clock
45
46  clock-names:
47    minItems: 3
48    maxItems: 5
49    contains:
50      enum:
51        - stmmaceth
52        - pclk
53        - ptp_ref
54        - tx
55        - mem
56
57  intf_mode:
58    $ref: /schemas/types.yaml#/definitions/phandle-array
59    items:
60      - items:
61          - description: phandle to the GPR syscon
62          - description: the offset of the GPR register
63    description:
64      Should be phandle/offset pair. The phandle to the syscon node which
65      encompases the GPR register, and the offset of the GPR register.
66
67  snps,rmii_refclk_ext:
68    $ref: /schemas/types.yaml#/definitions/flag
69    description:
70      To select RMII reference clock from external.
71
72required:
73  - compatible
74  - clocks
75  - clock-names
76
77unevaluatedProperties: false
78
79examples:
80  - |
81    #include <dt-bindings/interrupt-controller/arm-gic.h>
82    #include <dt-bindings/interrupt-controller/irq.h>
83    #include <dt-bindings/clock/imx8mp-clock.h>
84
85    eqos: ethernet@30bf0000 {
86            compatible = "nxp,imx8mp-dwmac-eqos","snps,dwmac-5.10a";
87            reg = <0x30bf0000 0x10000>;
88            interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
89                         <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
90            interrupt-names = "macirq", "eth_wake_irq";
91            clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>,
92                     <&clk IMX8MP_CLK_QOS_ENET_ROOT>,
93                     <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
94                     <&clk IMX8MP_CLK_ENET_QOS>;
95            clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";
96            phy-mode = "rgmii";
97    };
98